HCC/HCF4032B

Features:

`INVERT INPUTS ON ALL ADDERS FOR SUM COMPLEMENTING APPLICATIONS
`FULLY STATIC OPERATION...DC TO 10MHz (typ.)@ V_DD = 10V .BUFFERED INPUTS AND OUTPUTS
`SINGLE-PHASE CLOCKING
`STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS
`QUIESCENT CURRENT SPECIFIED TO 20VFOR HCC DEVICE
`5V, 10V, AND 15V PARAMETRIC RATING
`INPUT CURRENT OF 100nA AT 18V AND 25°CFOR HCC DEVICE
`100% TESTEDFOR QUIESCENT CURRENT
`MEETSALLREQUIREMENTSOFJEDECTENTATIVESTANDARDN° 13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIESCMOS DEVICES"


Pinout




Specifications

Symbol	Rating	Value	Unit
VDD*	Supply Voltage : HCC Types HCF Types	0.5 to + 20 0.5 to + 18	V V
Vi	Input Voltage	0.5 to VDD + 0.5	V
II	DC Input Current (any one input)	± 10	mA
Ptot	Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package-temperature Range	200 100	mW mW
Top	Operating Temperature : HCC Types HCF Types	55 to + 125 40 to + 85	°C °C
Tstg	Storage Temperature	65 to + 150	°C

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage values are referred to V_SS pin voltage.

Description

The HCC/HCF4032B (extended temperature range) and HCF4032B/4038B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package.

The HCC/HCF4032B and HCC/HCF4038B types consist of three serial adder circuits with common CLOCK and CARRY-RESET inputs. Each adder has two provisions for two serial DATA INPUT signals and an INVERT command signal. When the command signal is a logical "1", the sum is complemented. Data words enter the adder with the least significant bit first ; the sign bit trails. The output is theMOD 2sum of the input bits plus the carry from the previous bit position. The carry is only added at the positive-going clock transition for the HCC/HCF4032B or at the negative-going clock for the HCC/HCF4038B, thus, for spike-free operation the input data transitions should occur as soon as possible after the triggering edge. The CARRY is reset to a logical "0" at the end of each word by applying a logical "1" signal to a CARRY-RESET input one-bit-position before the application of the first bit of the next word.