Features: * Low-power consumption. -active: 45mA at 85ns. -stand by : 20 A (CMOS input / output)5 A (CMOS input / output, SL)* Single +2.7 to 3.3V power supply.* Equal access and cycle time.* 85 ns access time at 2.7V to 3.3V 70ns access time at 3V to 3.6V* 1.0V data retention mode.* TTL compatibl...
GLT6400L08: Features: * Low-power consumption. -active: 45mA at 85ns. -stand by : 20 A (CMOS input / output)5 A (CMOS input / output, SL)* Single +2.7 to 3.3V power supply.* Equal access and cycle time.* 85 ns ...
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Parameter |
Symbol |
Min |
Max |
Unit |
Voltage on Any Pin Relative to Gnd |
Vt |
-0.5 |
Vcc+0.3 |
V |
Power Dissipation |
PT |
- |
1.0 |
W |
Storage Temperature (Plastic) |
Tstg |
-55 |
+150 |
°C |
Temperature Under Bias |
Tbias |
-40 |
+85 |
°C |
*Note : Stresses greater than those listed above Absolute Maximum Ratings may cause permanent damage to the device.This is a stress rating only and functional operation of the device at these or any conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
The GLT6400L08 is a low power CMOS Static RAM organized as 524,288 x 8 bits. Easy memory expansion is provided by an active LOW CE1 an active LOW OE , and Tri-state I/O's. This device has an automatic power-down mode feature when deselected.
Writing to the GLT6400L08 is accomplished by taking chip Enable 1 ( CE1 ) with Write Enable ( WE ) LOW.Reading from the device is performed by taking Chip Enable 1 ( CE1 ) with Output Enable ( OE ) LOW while Write Enable ( WE ) and Chip Enable 2 (CE2) is HIGH. The I/O pins are placed in a high-impedance state when the device is deselected : the outputs are disabled during a write cycle.
The GLT6400L08 comes with a 1V data retention feature and Lower Standby Power. The GLT6400L08 is available in a 32-pin sTSOP packages,and 32pin SOP package.