GF9101

• highly optimized & flexible architecture for multirate FIR filtering applications
• implements dual 12 tap filters operating at 40 MHz or single 23 or 24 tap filter operating at 20 MHz maximum data rate
• stores up to 108 fully-programmable 12 tap filters with 12 bit coefficients at each tap, dynamically addressable in each clock cycle
• 3 flexible memory loading modes
• 20 bit pipeline for cascading up to 3 devices
• 20 bit output accumulator
• filter output negate and zero controls
• supports both symmetrical and asymmetrical FIR filters
• 40 MHz maximum computation and input/output data rates

The GF9101 is a high performance multirate digital filter which can be programmed to implement a wide range of signal processing functions using both symmetrical and asymmetrical filter structures. GF9101 is composed of a 12-tap FIR filter with internal RAM to hold up to 108 individual filters. An externally controlled address bus selects one of the 108 filters in each clock cycle. Pipelined architecture allows cascading of up to three devices with no additional hardware.

Two 10-bit input shift registers of GF9101 are provided for multiplexed filtering applications. The 12-bit coefficients can be programmed in serial, high speed parallel or microprocessor modes. In the high speed parallel mode,any one of the 108 filters can be reprogrammed in 18 clock cycles.