Features: ` Significantly Reduces Signal Peaks to 6 dB PAR` Programmable Output PAR Down to 6 dB ` Programmable Cancellation Pulse Coefs ` Meets 3GPP TS 25.141 Down to 6 dB PAR` Meets cdma2000 C.S0010 Down to 6 dB PAR` 256-ball PBGA Package, 17 ´ 17 mm` 1.2-V Core, 3.3 V I/OApplication· 3GPP...
GC1115: Features: ` Significantly Reduces Signal Peaks to 6 dB PAR` Programmable Output PAR Down to 6 dB ` Programmable Cancellation Pulse Coefs ` Meets 3GPP TS 25.141 Down to 6 dB PAR` Meets cdma2000 C.S00...
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UNIT | ||
VCC |
Supply voltage |
±1.2 V |
VI |
Input voltage |
±VCC |
IO |
Output current |
TBD mA |
TJ |
Maximum junction temperature |
105°C |
TA |
Operating free-air temperature |
40°C to +85°C |
Tstg |
Storage temperature |
65°C to 120°C |
Lead temperature 1,6 mm (1/16-inch) from case for 10 seconds |
TBD°C |
The GC1115 is a flexible, programmable, wideband crest factor reduction (CFR) processor with a maximum composite bandwidth of 20 MHz. The GC1115 selectively reduces the peak-to-average ratio (PAR) of wideband digital signals provided in quadrature (I & Q) format, such as those used in third-generation (3G) code division multiple access (CDMA) wireless applications. By reducing the PAR of digital signals, the efficiency of follow-on power amplifiers (PAs) is improved, the D/A converter requirements are eased, and the out-of-band spectral regrowth caused by simple hard limiting is eliminated.
By including the GC1115, manufacturers of 3G BTS equipment can realize significant savings on power amplifier costs. The GC1115 meets multi-carrier 3G performance standards (PCDE, composite EVM, and ACLR) at PAR levels down to 6 dB. The GC1115 integrates easily into the transmit signal chain, between a digital upconverter such as the Texas Instruments GC5016 or GC5316 and a high-quality D/A converter, such as the Texas Instruments DAC5675 or DAC5687.
The GC1115 uses four cascaded stages of peak detection and cancellation (PDC) to remove over-threshold peaks from the input signal. Each PDC stage can be independently programmed with detection target peak levels and cancellation pulse coefficients. A pool of 32 cancellation pulse generators can be flexibly assigned in groups of 4 to any PDC stage. Spectrally shaped cancellation pulses are designed using any of the widely available FIR filter design programs, such as those from Matlab™, ADS™, etc. Cancellation pulses are designed to match the user's carrier frequency allocation. Cancellation pulse energy is bandlimited and thus is only added within allocated carrier bands. The GC1115's peak cancellation algorithm does not affect the signal's ACLR.
Input sampling rates to 130 Msamp/sec are supported, in either parallel or multiplexed I/Q modes, and in either twos complement or unsigned format. Output sampling rates to 130 Msamp/sec are supported in either parallel or multiplexed I/Q modes, and in either twos complement or unsigned format. A special one-channel output mode uses both GC1115 output ports to carry odd/even real output samples. The GC1115 includes an interpolator that increases the output sampling rate by 2x or 4x and optionally modulates the output signal to the fs/4 center frequency. Dual on-chip RAM banks provide either time-domain snapshots or long-term histogramming of the internal peak cancellation signal chain at five user-selected points, enabling real-time monitoring of the CCDF function. A power level meter monitors either the GC1115 input or output power level.