FX929A

Features: · 4-Level FSK Modulation· Half Duplex, 4800 to 19.2k bits/sec· Full Packet Data Framing· RD-LAP Compatible*· Flexible Operating Modes· Host Bus Interface· Low Power 3.3V to 5V Operation· 24-Pin Small Form Package OptionDescriptionThe FX929A is a CMOS integrated circuit that contains all ...

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SeekIC No. : 004345842 Detail

FX929A: Features: · 4-Level FSK Modulation· Half Duplex, 4800 to 19.2k bits/sec· Full Packet Data Framing· RD-LAP Compatible*· Flexible Operating Modes· Host Bus Interface· Low Power 3.3V to 5V Operation· 2...

floor Price/Ceiling Price

Part Number:
FX929A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/10/17

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Product Details

Description



Features:

· 4-Level FSK Modulation
· Half Duplex, 4800 to 19.2k bits/sec
· Full Packet Data Framing
· RD-LAP Compatible*
· Flexible Operating Modes
· Host Bus Interface
· Low Power 3.3V to 5V Operation
· 24-Pin Small Form Package Option



Description

The FX929A is a CMOS integrated circuit that contains all of the baseband signal processing and Medium Access Control (MAC) protocol functions required for a high performance 4-level FSK Wireless Packet Data Modem. FX929A interfaces with the modem host processor and the radio modulation/demodulation circuits to deliver reliable two-way transfer of the application data over the wireless link.

The FX929A assembles application data received from the processor, adds forward error correction (FEC) and error detection (CRC) information and interleaves the result for burst-error protection. After adding symbol and frame sync codewords, it converts the packet into filtered 4-level analogue signals for modulating the radio transmitter.

In receive mode, the FX929A performs the reverse function using the analogue signals from the receiver iscriminator. After error correction and removal of the packet overhead, the recovered application data is supplied to the processor. Any residual uncorrected errors in the data will be flagged. A readout of the SNR value during receipt of a packet is also provided.

The FX929A uses data block sizes and FEC/CRC algorithms compatible with the RD-LAP over-air standard. The format used is suitable for other private applications which require the high-speed transfer of data over narrow-band wireless links. The device is programmable to operate at most standard bit-rates from a wide choice of Xtal/clock frequencies.




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