FCT646T

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.

The FCT646T/FCT2646T/FCT648T/FCT652T/2652T consist of a bus transceiver with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The FCT652T/FCT2652T utilize GAB and GBA signals to control the transceiver functions. The FCT646T/FCT2646T/ FCT648T utilize the enable control (G) and direction (DIR) pins to control the transceiver functions.

FCT646T/FCT2646T/FCT648T/FCT652T/2652T SAB and SBA control pins are provided to select either realtime or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and realtime data. A LOW input level selects real-time data and a HIGH selects stored data.

Data on the FCT646T/FCT2646T/FCT648T/FCT652T/2652T A or B data bus, or both, can be stored in the internal D flip-flops by LOW-to-HIGH transitions at the appropriate clock pins (CPAB or CPBA), regardless of the select or enable control pins.

The FCT646T/FCT2646T/FCT648T/FCT652T/2652T have balanced drive outputs with currentlimiting resistors. This offers low ground bounce, minimal undershoot and controlled output fall times-reducing the need for external series terminating resistors. FCT2xxxT parts are plug-in replacements for FCTxxxT parts.