EPF10K30RC240-3

Mounting Type: Surface Mount
Operating Temperature: 0°C ~ 85°C
Voltage - Supply: 4.75 V ~ 5.25 V
Manufacturer: Altera
Total RAM Bits: 12288
Number of LABs/CLBs: 216
Number of Logic Elements/Cells: 1728
Series: FLEX-10K®
Number of Gates: 69000
Supplier Device Package: 240-RQFP (32x32)
Number of I /O: 189
Package / Case: 240-BFQFP Exposed Pad


Description

The EPF10K30RC240-3 is one member of the EPF10K series.FLEX10K devices are reconfigurable, which allows 100% testing prior to shipment. As a result, the designer is not required to generate test vectors for fault coverage purposes. Additionally, the designer does not need to manage inventories of different ASIC designs; FLEX 10K devices can be configured on the board for the specific functionality required.

Features of the EPF10K30RC240-3 are:(1)devices are fabricated on advanced processes and operate with a 3.3-v or 5.0-v supply voltage; (2)in-circuit reconfigurability (icr) via external configuration device, intelligent controller, or jtag port; (3)clocklock TM  and clockboost TM options for reduced clock delay/skew and clock multiplication; (4)built-in low-skew clock distribution trees; (5)100% functional testing of all devices; test vectors or scan chains are not required.Altera's FLEX 10K devices are the industry's first embedded PLDs. Based on reconfigurable CMOS SRAM elements, the Flexible Logic Element MatriX (FLEX) architecture incorporates all features necessary to implement common gate array megafunctions. With up to 250,000 gates, the FLEX 10K family provides the density, speed, and features to integrate entire systems, including multiple 32-bit buses, into a single device.

The absolute maximum ratings of the EPF10K30RC240-3 can be summarized as:(1)supply voltage with respect to ground (2) Vcc:0.5 to 4.6 v; (2)dc input voltage Vi:2.0 to 5.75 v; (3) dc output current, per pin Iout:25 to 25 mA; (4)storage temperature Tstg:65 to 150; (5)ambient temperature under bias Tamb:65 to 135 .To better reflect actual designs, the power model (and the constant K in the power calculation equations) for continuous interconnect FLEX devices assumes that logic cells drive FastTrack Interconnect channels. In contrast, the power model of segmented FPGAs assumes that all logic cells drive only one short interconnect segment. This assumption may lead to inaccurate results, compared to measured power consumption for an actual design in a segmented interconnect FPGA.

Parameters:

Technical/Catalog Information	EPF10K30RC240-3
Vendor	Altera
Category	Integrated Circuits (ICs)
Number of Gates	-
Number of I /O	189
Number of Registers	-
Number of Logic Blocks/Elements	1728
Delay Time	-
Package / Case	240-RQFP
Operating Temperature	0°C ~ 85°C
Voltage - Supply	4.75 V ~ 5.25 V
Lead Free Status	Contains Lead
RoHS Status	RoHS Non-Compliant
Other Names	EPF10K30RC240 3 EPF10K30RC2403 544 2231 ND 5442231ND 544-2231