EP300

Features: • Fully supports PowerPC™ 60x bus protocol, include PowerPC 603, 604, 740, 750 and 8260.• Supports up to eight PowerPC bus masters with unlimited slave device support.• Supports two outstanding bus accesses.• Supports address only transfer and address bus re...

product image

EP300 Picture
SeekIC No. : 004337034 Detail

EP300: Features: • Fully supports PowerPC™ 60x bus protocol, include PowerPC 603, 604, 740, 750 and 8260.• Supports up to eight PowerPC bus masters with unlimited slave device support....

floor Price/Ceiling Price

Part Number:
EP300
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/11/23

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

• Fully supports PowerPC™ 60x bus protocol, include PowerPC 603, 604, 740, 750 and 8260.
• Supports up to eight PowerPC bus masters with unlimited slave device support.
• Supports two outstanding bus accesses.
• Supports address only transfer and address bus retry.
• Independent address bus and data bus tenure with separate bus grant and data bus grant.
•Option for fixed priority assignment or rotating priority scheme.
• Designed for ASIC or programmable logic device implementations in various system environments.
• Fully static design with edge triggered flip-flops.
• Optimized for ispXPGA product family.



Description

The EP300 PowerPC bus arbiter provides all the necessary functions to arbitrate multiple bus masters directly connected to the PowerPC host bus. The arbiter supports separate address and data bus tenure to realize the high performance allowed by the PowerPC bus architecture. Separate address bus grant and data bus grant signals are provided for each master device on the bus. The arbiter uses sophisticated built-in state machines to coordinate the address bus tenure and the data bus tenure. At any given cycle, up to two simultaneous bus accesses are allowed.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Crystals and Oscillators
Cables, Wires - Management
Sensors, Transducers
Boxes, Enclosures, Racks
Integrated Circuits (ICs)
View more