IC STRATIX II FPGA 60K 1020-FBGA
EP2S60F1020C4N: IC STRATIX II FPGA 60K 1020-FBGA
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Series: | Stratix® II | Manufacturer: | Altera | ||
Number of LABs/CLBs: | 3022 | Number of Logic Elements/Cells: | 60440 | ||
Total RAM Bits: | 2544192 | Number of I /O: | 718 | ||
Operating Supply Voltage : | 22 V | Number of Gates: | - | ||
Voltage - Supply: | 1.15 V ~ 1.25 V | Mounting Type: | Surface Mount | ||
Operating Temperature: | 0°C ~ 85°C | Package / Case: | 1020-BBGA |
The EP2S60F1020C4N belonges to Stratix II FPGA family which is based on a 1.2-V, 90-nm, all-layer copper SRA M process and features a new logic structure that maximizes performance. The EP2S60F1020C4N provides reach to 9 Mbits of on-chip, TriMatrix memory for requirement, memory intensive applications and has reach to 96 DSP blocks with reach to 384 (18-bit * 18-bit) multipliers for efficient implementation of high performance filters and other DSP functions. Various high-speed external memory interfaces are supported, containing double data rate (DDR) SDRAM and DDR2 SDRAM, RLDRAM II, quad data rate (QDR) II SRAM, and single data rate (SDR) SDRAM. The EP2S60F1020C4 N supports various I/O standards along with support for 1-gigabit per second (Gbps) source synchronous signaling with DPA circuitry.
Features of the EP2S60F1020C4N are:(1)15,600 to 179,400 equivalent LEs;;(2)new and innovative adaptive logic m odule (ALM), the basic building block of the Stratix II architecture, maximizes performance and resource usage efficie ncy;(3)trimatrix memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers;(4)up to 16 global clocks with 24 clocking resources per device region;(5)clock control blocks support dynamic clock network enable/disable,which allows clock networks to power down to reduce power consumption in user mode;(6)support for numerous single-ended and differential I/O standards;(7)support for design security using configuration bitstream encryption.
The absolute maximum ratings of the EP2S60F1020C4N can be summarized as:(1):supply voltage(VCCINT) is0.5V min and 1.8V max;(2):supply voltage(VCCIO) is0.5V min and 4.6V max;(3):analog power supply for PLLs(with resp ect to ground) is50.V min and 1.8 V max;(4):digital power supply for PLLs(With respect to ground)is0.5V min and 1.8V max; (5):DC input voltage is0.5V min and 4.6V max;(6):DC output current(per pin) is25mA min and 40 mA max;(7):storage temperature(No bias) is65°C min and 150°C max;(8):junction temperature(BGA packages under bias) is55°C min and 125°C max.
Technical/Catalog Information | EP2S60F1020C4N |
Vendor | Altera |
Category | Integrated Circuits (ICs) |
Number of Gates | - |
Number of I /O | 718 |
Number of Registers | - |
Number of Logic Blocks/Elements | 60440 |
Delay Time | - |
Package / Case | 1020-FBGA |
Operating Temperature | 0°C ~ 85°C |
Voltage - Supply | 1.14 V ~ 3.465 V |
Lead Free Status | Lead Free |
RoHS Status | RoHS Compliant |
Other Names | EP2S60F1020C4N EP2S60F1020C4N 544 1901 ND 5441901ND 544-1901 |