IC STRATIX II FPGA 180K 1020FBGA
EP2S180F1020I4: IC STRATIX II FPGA 180K 1020FBGA
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Series: | Stratix® II | Manufacturer: | Altera | ||
Number of LABs/CLBs: | 8970 | Number of Logic Elements/Cells: | 179400 | ||
Total RAM Bits: | 9383040 | Number of I /O: | 742 | ||
Operating Supply Voltage : | 22 V | Number of Gates: | - | ||
Voltage - Supply: | 1.15 V ~ 1.25 V | Mounting Type: | Surface Mount | ||
Operating Temperature: | -40°C ~ 100°C | Package / Case: | 1020-BBGA |
The EP2S180F1020I4 is one member of the EP2S180 series.DSP blocks can implement up to either eight full-precision 9 * 9-bit multipliers, four full-precision 18 * 18-bit multipliers, or one full-precision 36 * 36-bit multiplier with add or subtract features.The DSP blocks support Q1.15 format rounding and saturation in the multiplier and accumulator stages. These blocks also contain shift registers for digital signal processing applications, including finite impulse response (FIR) and infinite impulse response (IIR) filters.
Features of the EP2S180F1020I4 are:(1)New and innovative adaptive logic module (ALM), the basic building block of the Stratix II architecture, maximizes performance and resource usage efficiency; (2)Up to 9,383,040 RAM bits (1,172,880 bytes) available without reducing logic resources; (3)TriMatrixmemory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers; (4)High-speed DSP blocks provide dedicated implementation of multipliers (at up to 450 MHz), multiply-accumulate functions, and finite impulse response (FIR) filters; (5)Up to 16 global clocks with 24 clocking resources per device region; (6)Clock control blocks support dynamic clock network enable/disable, which allows clock networks to power down to reduce power consumption in user mode; (7)Up to 12 PLLs (four enhanced PLLs and eight fast PLLs) per device provide spread spectrum, programmable bandwidth, clock switch-over, real-time PLL reconfiguration, and advanced multiplication and phase shifting.
The absolute maximum ratings of the EP2S180F1020I4 can be summarized as:(1)supply voltage:-0.5 to 1.8V;(2)storage temperature:-65 to 150;(3)DC output current,per pin:-25 to 40mA;(4)junction temperature:-55 to 125.One ALM contains two programmable registers. Each register has data,clock, clock enable, synchronous and asynchronous clear, asynchronous load data, and synchronous and asynchronous load/preset inputs.Global signals, general-purpose I/O pins, or any internal logic can drive the register's clock and clear control signals. Either general-purpose I/O pins or internal logic can drive the clock enable, preset, asynchronous load, and asynchronous load data.
Technical/Catalog Information | EP2S180F1020I4 |
Vendor | Altera |
Category | Integrated Circuits (ICs) |
Number of Gates | - |
Number of I /O | 742 |
Number of Registers | - |
Number of Logic Blocks/Elements | 179400 |
Delay Time | - |
Package / Case | 1020-FBGA |
Operating Temperature | -40°C ~ 100°C |
Voltage - Supply | 1.14 V ~ 3.465 V |
Lead Free Status | Contains Lead |
RoHS Status | RoHS Non-Compliant |
Other Names | EP2S180F1020I4 EP2S180F1020I4 544 2162 ND 5442162ND 544-2162 |