EP220

Features: `High-performance, low-power Erasable Programmable LogicDevices (EPLDs) with 8 macrocells Combinatorial speeds as low as 7.5 ns Counter frequencies of up to 100 MHz Pipelined data rates of up to 115 MHz Maximum 5.5-ns Clock-to-output time; minimum 4.5-ns setuptime`Replacement or upgr...

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SeekIC No. : 004337017 Detail

EP220: Features: `High-performance, low-power Erasable Programmable LogicDevices (EPLDs) with 8 macrocells Combinatorial speeds as low as 7.5 ns Counter frequencies of up to 100 MHz Pipelined data rates...

floor Price/Ceiling Price

Part Number:
EP220
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

`High-performance, low-power Erasable Programmable LogicDevices (EPLDs) with 8 macrocells
   Combinatorial speeds as low as 7.5 ns
   Counter frequencies of up to 100 MHz
   Pipelined data rates of up to 115 MHz
   Maximum 5.5-ns Clock-to-output time; minimum 4.5-ns setuptime
`Replacement or upgrade for 16V8/20V8 PAL and GAL devices
`Up to 18 inputs (10 dedicated inputs) in EP220, 22 inputs (14dedicated inputs) in EP224; up to 8 outputs in both EP220 and EP224
`Macrocells independently programmable for both registered andcombinatorial logic
`Programmable inversion control supporting active-high or activelowoutputs
`Low power consumption
   Typical ICC= 90 mA at 25 MHz (for -7A speed grades)
   Quarter-power mode (ICC= 40 mA)
   Programmable zero-power mode with typical ICC= 50mA(for -10A and -12 speed grades)
`Programmable Security Bit for total protection of proprietary designs
`Low output skew for Clock driver applications
`100% generically tested to provide 100% programming yield
`Software and programming support from Altera and a wide range of third-party tools
`Available in windowed ceramic and one-time-programmable (OTP) plastic packages
   20-pin plastic J-lead package (PLCC)
   20-pin ceramic and plastic dual in-line packages (CerDIP and PDIP)
   24-pin PDIP
   28-pin PLCC



Pinout

  Connection Diagram


Specifications

Symbol Parameter Conditions
Min
Max
Unit
VCC Supply voltage Note (2)
-2.0
7.0
V
VI DC input voltage Note (2),(3)
-0.5
VCC+0.5
V
TSTG Storage temperature  
-65
150
TAMB Ambient temperature Note (4)
-10
85



Description

The EPROM-based EP220 and EP224 devices feature a flexible I/O architecture and implement 150 usable (300 available) gates of custom user logic functions. EP220 and EP224 devices can be used as upgrades for high-speed bipolar programmable logic devices (PLDs) or for 74-series LS and CMOS (SSI and MSI) logic devices in high-performance microcomputer systems.

Compared to bipolar devices of equivalent speed, the EP220 and EP224 offer lower power consumption, faster input-to-nonregistered-output delay (tPD) in combinatorial mode, and higher counter frequencies in registered applications. This added performance supports faster state machine designs compared to bipolar devices, and provides additional timing margin for existing designs. The EP220 and EP224 are ideal for high-volume manufacturing of high-performance systems. These devices improve performance and decrease system noise, power consumption, and heat generation.




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