EP20K100ETC144-2

The EP20K100ETC144-2 is one member of the Altera's Flexible Logic Element MatriX family which combines the benefits of both erasable programmable logic devices (EPLDs) and fieldprogrammable gate arrays (FPGAs). And this device is ideal for a variety of applications because it combines the fine grained architecture and high register count characteristics of FPGAs with the high speed and predictable interconnect delays of EPLDs.

Features of the EP20K100ETC144-2 are:(1)in-circuit reconfigurability (ICR) via external configuration EPROM or intelligent controller;(2)fully compliant with the peripheral component interconnect (PCI) standard;(3)built-in joint-test action group (JTAG) boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990 on selected devices;(4)low power consumption (typical specification less than 0.5 mA in standby mode);(5)tri-state emulation that implements internal tri-state nets;(6)powerful I/O pins--programmable output slew-rate control reduces switching n;(7)peripheral register for fast setup and clock-to-output delay;(8)available in a variety of packages with 84 to 304 pins;(9)fabricated on an advanced SRAM process.

The absolute maximum ratings of the EP20K100ETC144-2 can be summarized as:(1)supply voltage:-2.0 to 7.0 V;(2)DC input voltage:-2.0 to 7.0 V;(3)DC output current, per pin:-25 to 25 mA;(4)storage temperature:-65 to 150 °C;(5)ambient temperature:-65 to 135 °C;(6)junction temperature (ceramic packages, under bias):150 °C;(7)junction temperature (PQFP and RQFP, under bias):135 °C. If you want to know more information such as the electrical characteristics about the EP20K100ETC144-2, please download the datasheet in www.seekic.com or www.chinaicmart.com .