Features: • 2 x 4 banks x 2 Mbit x 16 organisation ( Two 128MBit chips stacked in multi-chip package)• Fully Synchronous to Positive Clock Edge• Single 1.8V ±0.1V Power Supply• LVCMOS Compatible with Multiplexed Address• Programmable Burst Length 1/2/4/8/ full Page...
EM48AM1644LBB: Features: • 2 x 4 banks x 2 Mbit x 16 organisation ( Two 128MBit chips stacked in multi-chip package)• Fully Synchronous to Positive Clock Edge• Single 1.8V ±0.1V Power Supply̶...
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DescriptionThe EM481M1622VTC is Synchronous Dynamic Random Access Memory (SDRAM) organized as 512K...
DescriptionThe EM484M1644VTA is Synchronous Dynamic Random Access Memory (SDRAM) organized as 1Meg...
Symbol | Item | Rating | Units | |
VIN, VOUT | Input, Output Voltage | -0.3 ~ +4.6 | V | |
VDD, VDDQ | Power Supply Voltage | -0.3 ~ +4.6 | V | |
TOP | Operating Temperature Range | Commercial | 0 ~ +70 | |
Extended | -25 ~ +85 | |||
TSTG | Storage Temperature Range | -55 ~ +150 | ||
PD | Power Dissipation | 1 | W | |
IOS | Short Circuit Current | 50 | mA |
Note: Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause permanent damage. The device is not meant to be operated under conditions outside the limits described in the operational section of this specification. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
The EM48AM1684LBB is Synchronous Dynamic Random Access Memory (SDRAM) organized as 2 x 4 banks x 2 Mbit by 16 bits. All inputs and outputs are synchronized with the positive edge of the clock.
The 256Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 1.8V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVCMOS.
Available packages:TFBGA 54B 12mm x 8mm.