Features: • Power supply : VDDQ = 2.5V ±0.2V: VDD = 2.5V ±0.2V • Data rate: 333Mbps/266Mbps (max.) • Double Data Rate architecture; two data transfers per clock cycle • Bi-directional, data strobe (DQS) is transmitted /received with data, to be used in capturing data at the...
EDD2504AKTA-6B-E: Features: • Power supply : VDDQ = 2.5V ±0.2V: VDD = 2.5V ±0.2V • Data rate: 333Mbps/266Mbps (max.) • Double Data Rate architecture; two data transfers per clock cycle • Bi-di...
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Features: Power supply : VDDQ = 2.5V ± 0.2V : VDD = 2.5V ± 0.2V Data rate: 333Mbps/266Mbps (max.)...
Features: • Power supply : VDDQ = 2.5V ±0.2V: VDD = 2.5V ±0.2V • Data rate: 333Mbps/26...
The EDD2504AKTA is a 256M bits Double Data Rate (DDR) SDRAM organized as 16,777,216 words × 4 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data transfer EDD2504AKTA is realized by the 2 bits prefetch-pipelined architecture. Data strobe (DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable. It is packaged in 66-pin plastic TSOP (II).