EBS52UC8APSA

Features:

• Fully compatible with 8 bytes S.O.DIMM: JEDEC standard outline
• 144-pin socket type small outline dual in line memory module (S.O.DIMM)
       -PCB height: 31.75mm (1.25inch )
       -Lead pitch: 0.80mm
• 3.3V power supply
• Clock frequency: 133MHz (max.)
• LVTTL interface
• Data bus width: * 64 non-ECC
• Single pulsed /RAS
• 4 Banks can operates simultaneously and independently
• Burst read/write operation and burst read/single write operation capability
• Programmable burst length (BL): 1, 2, 4, 8, Full page
• 2 variations of burst sequence
       -Sequential
       -Interleave
• Programmable /CAS latency (CL): 2, 3
• Byte control by DQMB
• Refresh cycles: 8192 refresh cycles/64ms
• 2 variations of refresh
       -Auto refresh
       -Self refresh


Specifications

Parameter	Symbol	Value	Unit	Note
Voltage on any pin relative to VSS	VT	0.5 to VDD + 0.5 ( 4.6 (Max))	V
Supply voltage relative to VSS	VDD	0.5 to +4.6	V
Short circuit output current	IOS	50	mA
Power dissipation	PD	16	W
Operating case temperature	TA	0 to +70		1
Storage temperature	Tstg	55 to +125

Description

The EBS52UC8APSA is 64M words × 64 bits, 2 banks Synchronous Dynamic RAM Small Outline Dual In-line Memory Module (S.O.DIMM), mounted 16 pieces of 256M bits SDRAM sealed in µBGA package. This module EBS52UC8APSA provides high density and large quantities of memory in a small space without utilizing the surface mounting technology. Decoupling capacitors are mounted on power supply line for noise reduction.