EBE41RE4AAHA

Features: • 240-pin socket type dual in line memory module (DIMM) -PCB height: 30.0mm -Lead pitch: 1.0mm -Lead-free (RoHS compliant)• Power supply: VDD, VDDQ = 1.8V ± 0.1V• Data rate: 533Mbps/400Mbps (max.)• SSTL_18 compatible I/O• Double-data-rate architecture: two d...

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SeekIC No. : 004331041 Detail

EBE41RE4AAHA: Features: • 240-pin socket type dual in line memory module (DIMM) -PCB height: 30.0mm -Lead pitch: 1.0mm -Lead-free (RoHS compliant)• Power supply: VDD, VDDQ = 1.8V ± 0.1V• Data ra...

floor Price/Ceiling Price

Part Number:
EBE41RE4AAHA
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• 240-pin socket type dual in line memory module (DIMM)
        -PCB height: 30.0mm
        -Lead pitch: 1.0mm
        -Lead-free (RoHS compliant)
• Power supply: VDD, VDDQ = 1.8V ± 0.1V
• Data rate: 533Mbps/400Mbps (max.)
• SSTL_18 compatible I/O
• Double-data-rate architecture: two data transfers per clock cycle
• Bi-directional, data strobe (DQS and /DQS) is transmitted /received with data, to be used in capturing data at the receiver
• DQS is edge aligned with data for READs; center aligned with data for WRITEs
• Differential clock inputs (CK and /CK)
• DLL aligns DQ and DQS transitions with CK transitions
• Commands entered on each positive CK edge; data referenced to both edges of DQS
• Eight internal banks for concurrent operation (Components)
• Burst length: 4, 8
• /CAS latency (CL): 3, 4, 5
• Auto precharge option for each burst access
• Auto refresh and self refresh modes
• Average refresh period
        -7.8µs at 0 TC +85
        -3.9µs at +85 < TC +95
• Posted CAS by programmable additive latency for better command and data bus efficiency
• Off-Chip-Driver Impedance Adjustment and On-Die- Termination for better signal quality
• /DQS can be disabled for single-ended Data Strobe operation
• 1 piece of PLL clock driver, 2 pieces of register drivers and 1 piece of serial EEPROM (2k bits EEPROM) for Presence Detect (PD)



Specifications

Parameter Symbol Value Unit Note
Voltage on any pin relative to VSS VT -0.5 to +2.3 V 1
Supply voltage relative to VSS VDD -0.5 to +2.3 V  
Short circuit output current IOS 50 mA 1
Power dissipation PD 18 W  
Operating ambient temperature TC 0 to +95 1,2
Storage temperature Tstg -55 to +100 1



Description

The EBE41RE4AAHA is a 512M words × 72 bits, 2 ranks DDR2 SDRAM Module, mounting 36 pieces of 1G bits DDR2 SDRAM with sFBGA stacking technology. Read and write operations are performed at the cross points of the CK and the /CK. This highspeed data transfer EBE41RE4AAHA is realized by the 4bits prefetchpipelined architecture. Data strobe (DQS and /DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable. This module EBE41RE4AAHA provides high density mounting without utilizing surface mount technology. Decoupling capacitors are mounted beside each SDRAM on the module board.


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