EBE20AE4ACFA

PinoutSpecificationsDensity: 2GB Organization256M words x 72 bits, 1 rank Mounting 18 pieces of 1G bits DDR2 SDRAM sealed in FBGA Package: 240-pin socket type dual in line memory module (DIMM)-PCB height: 30.0mm-Lead pitch: 1.0mm-Lead-free (RoHS compliant) Power supply: VDD = 1.8V +/- 0.1V...

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SeekIC No. : 004331013 Detail

EBE20AE4ACFA: PinoutSpecificationsDensity: 2GB Organization256M words x 72 bits, 1 rank Mounting 18 pieces of 1G bits DDR2 SDRAM sealed in FBGA Package: 240-pin socket type dual in line memory module (DIMM)...

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Part Number:
EBE20AE4ACFA
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/31

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Product Details

Description



Pinout

  Connection Diagram




Specifications

  • Density: 2GB
  • Organization
    256M words x 72 bits, 1 rank
  • Mounting 18 pieces of 1G bits DDR2 SDRAM sealed in FBGA
  • Package: 240-pin socket type dual in line memory module (DIMM)
    -PCB height: 30.0mm
    -Lead pitch: 1.0mm
    -Lead-free (RoHS compliant)
  • Power supply: VDD = 1.8V +/- 0.1V
  • Data rate: 667Mbps (max.)
  • Eight internal banks for concurrent operation (components)
  • Interface: SSTL_18
  • Burst lengths (BL): 4, 8
  • /CAS Latency (CL): 3, 4, 5
  • Precharge: auto precharge option for each burst access
  • Refresh: auto-refresh, self-refresh
  • Refresh cycles: 8192 cycles/64ms
    -Average refresh period
    7.8 µs at 0'C <= TC <= +85'C
    3.9 µs at +85'C < TC <= +95'C
  • Operating case temperature range
    -TC = 0'C to +95'C





  • Description

    Features of the EBE20AE4ACFA are:(1)double-data-rate architecture; two data transfers per clock cycle;(2)the high-speed data transfer is realized by the 4 bits prefetch pipelined architecture;(3)bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver;(4)DQS is edge-aligned with data for READs; centeraligned with data for WRITEs;(5)differential clock inputs (CK and /CK);(6)DLL aligns DQ and DQS transitions with CK transitions;(7)commands entered on each positive CK edge; data and data mask referenced to both edges of DQS;(8)data mask (DM) for write data;(9)posted /CAS by programmable additive latency for better command and data bus efficiency;(10)off-chip-driver impedance adjustment and on-die-termination for better signal quality;(11)DQS can be disabled for single-ended data strobe operation;(12)1 piece of PLL clock driver, 2 pieces of register driver and 1 piece of serial EEPROM (2K bits EEPROM) for presence Detect (PD).

    Specifications of the EBE20AE4ACFA are:(1)density is 2GB;(2)organization is 256M words * 72 bits, 2 ranks;(3)mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA;(4)power supply is VDD=1.8V±0.1V;(5)data rate is 667Mbps (max.);(6)four internal banks for concurrent operation (components);(7)interface is SSTL_18;(8)burst lengths (BL) is 4, 8;(9)CAS latency (CL) is 3, 4, 5, 6;(10)precharge: auto precharge option for each burst access;(11)refresh is auto-refresh, self-refresh;(12)refresh cycles is 8192 cycles/64ms;(13)operating case temperature range is 0 to +95.

    The absolute maximum ratings of the EBE20AE4ACFA can be summarized as:(1):the parameter is voltage on any pin relative to VSS,the symbol is VT,the value is -0.5 to +2.3,the unit is V;(2):the parameter is supply voltage relative to VSS,the symbol is VDD,the value is -0.5 to +2.3,the unit is V;(3):the parameter is short circuit output current,the symbol is IOS,the value is 50,the unit is mA;(4):the parameter is power dissipation,the symbol is PD,the value is 18,the unit is W;(5):the parameter is operating case temperature,the symbol is Tc,the value is 0 to +95,the unit is ;(6):the parameter is storage temperature,the symbol is Tstg,the value is -55 to +100,the unit is .






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