EBD52UD6ADSA-E

Features:

• 200-pin socket type small outline dual in line memory module (SO-DIMM) 
        -PCB height:  31.75mm 
        -Lead pitch:  0.6mm 
        -Lead-free
• 2.5V power supply
• Data rate: 333Mbps/266Mbps (max.)
• 2.5 V (SSTL_2 compatible) I/O
• Double Data Rate architecture; two data transfers per clock cycle 
• Bi-directional, data strobe (DQS) is transmitted /received with data, to be used in capturing data at the receiver 
• Data inputs, outputs and DM are synchronized with DQS 
• 4 internal banks for concurrent operation  (Components)
• DQS is edge aligned with data for READs; center aligned with data for WRITEs
• Differential clock inputs (CK and /CK)
• DLL aligns DQ and DQS transitions with CK transitions
• Commands entered on each positive CK edge; data referenced to both edges of DQS
• Data mask (DM) for write data
• Auto precharge option for each burst access
• Programmable burst length:  2, 4, 8
• Programmable /CAS latency (CL):  2, 2.5
• Refresh cycles:  (8192 refresh cycles /64ms) 
        -7.8µs maximum average periodic refresh interval
• 2 variations of refresh 
        -Auto refresh 
        -Self refresh


Specifications

Parameter	Symbol	Value	Unit	Note
Voltage on any pin relative to VSS	VT	-1.0 to +3.6	V
Supply voltage relative to VSS	VDD	-1.0 to +3.6	V
Short circuit output current	IOS	50	mA
Power dissipation	PD	8	W
Operating ambient temperature	TA	0 to +70		1
Storage temperature	Tstg	-55 to +125

Description

The EBD52UD6ADSA is 64M words × 64 bits, 2 ranks Double Data Rate (DDR) SDRAM Small  Outline Dual In-line Memory Module, mounting 8 pieces of 512M bits DDR SDRAM sealed in TSOP package.  Read and write operations are  performed at the cross points of the CK and the /CK. 

This high-speed data transfer EBD52UD6ADSA is realized by the 2 bits prefetch-pipelined architecture.  Data strobe (DQS) both for read and write are available for high speed and reliable data bus design.  By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable.  This module provides high density mounting without utilizing surface mount technology.  Decoupling capacitors are mounted beside each TSOP on the module board.