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Nominal Frequency | 50.000MHz, 51.840MHz, 52.000MHz, 52.080MHz, 54.000MHz, 57.1429MHz, 61.440MHz, 63.360MHz, 65.536MHz, 76.800MHz, 77.760MHz, 100.000MHz, 104.000MHz, 106.250MHz, 125.000MHz, 126.720MHz, 128.000MHz, 153.600MHz, 155.520MHz, 156.250MHz, 159.375MHz, 161.1328MHz, 166.6286MHz, 167.3315MHz, 184.320MHz, or 186.666MHz |
The specified reference or "center" frequency of the oscillator. Typically specified in megahertz (MHz)or kilohertz (kHz). |
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| Frequency Tolerance/Stability | Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the Operating Temperature Range, Supply Voltage Change, Output Load Change, 1st Year Aging at 25°C, Shock, and Vibration
±50ppm Maximum
±25ppm Maximum |
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Operating Temperature Range | 0°C to +70°C
-40°C to +85°C |
The maximum and minimum temperatures that the oscillator device can be exposed to during oscillation. Over thistemperature range, all of the specified device operatingparameters are guaranteed. |
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Supply Voltage (VCC) | 3.3VDC ±5% |
The DC input voltage necessary for oscillator operation, specified involts. |
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Input Current | 100mA Maximum (with Load) |
The amount of current consumption by an oscillator from the powersupply, typically specified in milliamps (mA). |
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Output Voltage Logic High (VOH) | VCC-1.025VDC Minimum |
Defined as the Output Voltage Logic High or "Logic 1" (Figure 1 in oscillator glossary of terms). |
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Output Voltage Logic Low (VOL) | VCC-1.620VDC Maximum |
Defined as the Output Voltage Logic Low or "Logic 0" (Figure 1 in oscillator glossary of terms). |
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Duty Cycle | Measured at 50% of waveform
50 ±10(%)
50 ±5(%) |
The measure of output waveform uniformity. This term, also referredto as symmetry, is a measurement of the time that the outputwaveform is in a logic high state, expressed as a percentage (%).This parameter is measured at a specified voltage threshold or at apercentage of the output waveform amplitude (Figure 1 in the oscillator glossary of terms). |
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Rise Time/Fall Time | Measured over 20% to 80% of waveform
1.5 nSec Maximum |
The Rise Time, measured in nanoseconds (nSec), is defined as thetransition time from an output logic low to an output logic high.Conversely, the Fall Time, also measured in nanoseconds (nSec), isdefined as the transition time from an output logic high to an outputlogic low. This transition time is measured at specified voltagethresholds or at specified percentages of the output waveformamplitude (Figure 1 in the oscillator glossary of terms). |
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| Load Drive Capability | 50 Ohms into VCC-2.0VDC |
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| Control Voltage (VC) | 1.65VDC ±1.65VDC (Test condition for frequency deviation) |
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| Control Voltage Range (VCR) | 0.0VDC to VCC +0.5VDC |
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| Frequency Deviation | Inclusive of Operating Temperature Range, Supply Voltage Change, and Output Load Change
±75ppm Minimum |
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| Linearity | 20% Maximum
15% Maximum
10% Maximum |
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| Transfer Function | Positive Transfer Characteristic |
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Storage Temperature | -55°C to +125°C |
The minimum and maximum temperatures that the device can be stored or exposed to when in a non-oscillation state. After exposing or storing the device at the minimum or maximum temperatures for a length of time, all of the operating specifications are guaranteed over the specified Operating Temperature Range. |
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| Logic Control / Additional Output | Tri-State Enable Low / Complementary Output |
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| Tri-State Input Voltage | VIH of 70% of VCC Minimum to Disbale Outputs (High Impedance), VIL of 30% of VCC Maximum or No Connect to Enable Outputs at Logic Control / Additional Output of Tri-State (Enable Low) / Complementary Output |
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| Start-Up Time | 10mSec Maximum |
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| RMS Phase Jitter | 0.5pSec Typical, 1pSec Maximum (FJ=12kHz to 20MHz) |
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| Accumulated Period Jitter (tACC) | 4pSec Typical, 5pSec Maximum (Sigma of Total Jitter Distribution) |
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| Period Jitter (tRJ) | 3pSec Typical, 5pSec Maximum (Sigma of Random Jitter) |
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| Period Jitter (tRMS) | 3pSec Typical, 5pSec Maximum (Sigma of Total Jitter Distribution) |
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| Period Jitter (tDJ) | 4pSec Typical, 10pSec Maximum (Deterministic Jitter) |
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| Period Jitter (tP-P) | 27pSec Typical, 40pSec Maximum (Peak-to-Peak of Jitter Distribution) |
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| Phase Noise | Typical Values, FO = 155.520MHz
-55dBc/Hz at 10Hz Offset
-90dBc/Hz at 100Hz Offset
-120dBc/Hz at 1kHz Offset
-140dBc/Hz at 10kHz Offset
-145dBc/Hz at 100kHz Offset
-148dBc/Hz at 1MHz Offset |
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| Modulation Bandwidth (MBW) | 10kHz Minimum (Measured at -3dB with Control Voltage of +1.65VDC |
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| Input Impedance (ZI) | 50kOhms Typical |
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E32D1 Data Sheet
