DSP56309

Features: ·The DSP56309 is a member of the DSP56300 family of programmable CMOS DSPs. The DSP56309 uses the DSP56300 core, a high-performance engine with a single clock cycle per instruction. The DSP56300 core provides up to twice the performance of Motorola's popular DSP56000 core family, while r...

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SeekIC No. : 004329620 Detail

DSP56309: Features: ·The DSP56309 is a member of the DSP56300 family of programmable CMOS DSPs. The DSP56309 uses the DSP56300 core, a high-performance engine with a single clock cycle per instruction. The DS...

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DSP56309
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5000

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Description



Features:

·The DSP56309 is a member of the DSP56300 family of programmable CMOS DSPs. The  DSP56309 uses the DSP56300 core, a high-performance engine with a single clock cycle  per instruction. The DSP56300 core provides up to twice the performance of Motorola's  popular DSP56000 core family, while retaining code compatibility.

·The DSP56300 core family offers a new level of performance in speed and power  provided by its rich instruction set and low-power dissipation, enabling a new  generation of wireless, telecommunications, and multimedia products. The DSP56300  core is composed of the data arithmetic logic unit (Data ALU), address generation unit  (AGU), program controller (PC), instruction cache controller, bus interface unit, direct  memory access (DMA) controller, On-Chip Emulation (OnCE) module, and a PLL-based  clock oscillator. Significant architectural enhancements to the DSP56300 core family  include a barrel shifter, 24-bit addressing, an instruction cache, and DMA.

·The DSP56300 core family members contain the DSP56300 core and additional modules.  The modules are chosen from a library of standard pre-designed elements, such as  memories and peripherals. New modules can be added to the library to meet customer  specifications. A standard interface between the DSP56300 core and the on-chip memory  and peripherals supports a wide variety of memory and peripheral configurations.

·The DSP56309 targets telecommunications applications, such as multi-line  voice/data/fax processing, video conferencing, audio applications, control, and general  digital signal processing.



Description

This manual describes the DSP56309 24-bit digital signal processor (DSP), its memory,  operating modes, and peripheral modules. The DSP56309 is an implementation of the DSP56300 core with a unique configuration of on-chip memory, cache, and peripherals.

This manual is intended to be used with the  DSP56300 Family Manual (DSP56300FM/AD),  which describes the central processing unit (CPU), core programming models, and  instruction set details.

DSP56309 Technical Data (DSP56309/D) provides electrical  specifications, timing, pinout, and packaging descriptions of the DSP56309.

You can obtain these documents, as well as MotorolaÕs DSP development tools, through  a local Motorola Semiconductor Sales Office or authorized distributor.

To receive the latest information about this DSP, access the Motorola DSP home page at  the address on the back cover of this document.


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