DSP56166

The DSP56166 is the second member of Motorola's DSP56100 family of HCMOS, low power, 16-bit general purpose Digital Signal Processors (DSP). Designed primarily for speech coding and digital communications, the DSP56166 has a built-in SD codec and phase locked loop (PLL). This MPU-style DSP also contains, memories, digital peripherals, and provides a cost effective, high performance solution to many DSP applications. On-Chip Emulation (OnCE ä ) circuitry provides convenient and inexpensive debug facilities normally available only through expensive external hardware. Development costs are reduced and in-field testing is greatly simplified by using the OnCE. The DSP56166 RAM based is an off the shelf part since there are no user programmable ROM's onchip.

The DSP56166 ROM based contains a 12K ROM (8Kx 16 program ROM and 4Kx16 data ROM).

The Central Processing Unit (CPU) consists of three execution units operating in parallel allowing up to six operations to occur in an instruction cycle. This parallelism greatly increases the effective processing speed of the DSP56166. The MPU-style programming model and instruction set allow straightforward generation of efficient, compact code. The basic architectures and development tools of the DSP56100 family, DSP56000 family, and DSP96002 are so similar that learning to design and program one greatly reduces
the time needed to learn the others.