DS90LV028A

Features: >400 Mbps (200 MHz) switching rates50 ps differential skew (typical)0.1 ns channel-to-channel skew (typical)2.5 ns maximum propagation delay3.3V power supply designFlow-through pinoutPower down high impedance on LVDS inputsLow Power design (18mW @ 3.3V static)Interoperable with existi...

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DS90LV028A Picture
SeekIC No. : 004329395 Detail

DS90LV028A: Features: >400 Mbps (200 MHz) switching rates50 ps differential skew (typical)0.1 ns channel-to-channel skew (typical)2.5 ns maximum propagation delay3.3V power supply designFlow-through pinoutPo...

floor Price/Ceiling Price

Part Number:
DS90LV028A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

>400 Mbps (200 MHz) switching rates
50 ps differential skew (typical)
0.1 ns channel-to-channel skew (typical)
2.5 ns maximum propagation delay
3.3V power supply design
Flow-through pinout
Power down high impedance on LVDS inputs
Low Power design (18mW @ 3.3V static)
Interoperable with existing 5V LVDS networks
Accepts small swing (350 mV typical) differential signal levels
Supports open, short and terminated input fail-safe
Conforms to ANSI/TIA/EIA-644 Standard
Industrial temperature operating range (−40°C to +85°C)
Available in SOIC package





Pinout

  Connection Diagram




Specifications

PHY Type Receiver
Family LVDS
Channels 2 Channels
Max Data Rate 400 Mbps
Input Compatibility LVDS
Output Compatibility LVTTL
Power Consumption_ 18 mW
Special Features Failsafe
SupplyVoltage 3.3 Volt
JTAG1149.1 No
Temperature Min -40 deg C
Temperature Max 85 deg C
Automotive Selection Guide No
Function Receiver
View Using Catalog





Description

The DS90LV028A is a dual CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV028A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV028A has a flow-through design for easy PCB layout.

The DS90LV028A and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

Reliability Metrics


Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
DS90LV028ATLD .35 0 18700 0 0 1290000 3 366041022
DS90LV028ATM .35 0 18700 0 0 1290000 3 366041022
DS90LV028ATMX .35 0 18700 0 0 1290000 3 366041022

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.







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