Features: >155.5 Mbps (77.7 MHz) switching rates Accepts small swing (350 mV) differential signal levelsHigh Impedance LVDS inputs with power downUltra low power dissipation600 ps maximum differential skew (5V, 25°C)6.0 ns maximum propagation delayIndustrial operating temperature rangeAvailable...
DS90C032B: Features: >155.5 Mbps (77.7 MHz) switching rates Accepts small swing (350 mV) differential signal levelsHigh Impedance LVDS inputs with power downUltra low power dissipation600 ps maximum differe...
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>155.5 Mbps (77.7 MHz) switching rates
Accepts small swing (350 mV) differential signal levels
High Impedance LVDS inputs with power down
Ultra low power dissipation
600 ps maximum differential skew (5V, 25°C)
6.0 ns maximum propagation delay
Industrial operating temperature range
Available in surface mount packaging (SOIC)
Pin compatible with DS26C32A, MB570 (PECL) and 41LF (PECL)
Supports OPEN and terminated input fail-safe
Conforms to ANSI/TIA/EIA-644 LVDS standard
PHY Type | Receiver |
Family | LVDS |
Channels | 4 Channels |
Max Data Rate | 155 Mbps |
Input Compatibility | LVDS |
Output Compatibility | TTL |
Power Consumption_ | 18 mW |
Special Features | Power Off High Z, Failsafe |
SupplyVoltage | 5 Volt |
JTAG1149.1 | No |
Temperature Min | -40 deg C |
Temperature Max | 85 deg C |
Function | Receiver |
View Using Catalog |
Supply Voltage (VCC) ............................................−0.3V to +6V
Input Voltage (RIN+, RIN−) .................................−0.3V to +5.8V
Enable Input Voltage(EN, EN*) ..............−0.3V to (VCC + 0.3V)
Output Voltage (ROUT) ............................−0.3V to (VCC + 0.3V)
Maximum Package Power Dissipation @ .........................+25°C
M Package ...................................................................1025 mW
Derate M Package .............................8.2 mW/°C above +25°C
Storage Temperature Range ........................−65°C to +150°C
Lead Temperature RangeSoldering (4 sec.)................. +260°C
Maximum JunctionTemperature ....................................+150°C
TheDS90C032B is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.
TheDS90C032B accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE® function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.
The DS90C032Bprovides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.
The DS90C032Band companion line driver (DS90C031B) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.
Reliability Metrics
Part Number | Process | EFR Reject | EFR Sample Size | PPM | LTA Rejects | LTA Device Hours | FITS | MTTF (Hours) |
DS90C032BTM | CS080 | 0 | 29095 | 0 | 0 | 2720500 | 2 | 771949303 |
DS90C032BTMX | CS080 | 0 | 29095 | 0 | 0 | 2720500 | 2 | 771949303 |
Application Notes
Title | Size in Kbytes | Date | |
AN-1934: Application Note 1934 Failsafe Options for LVDS Receivers | 122 Kbytes | 20-Jan-09 | Download |
If you have trouble printing or viewing PDF file(s), see Printing Problems. |
More Application Notes
Title | Size in Kbytes | Date | |
AN-971: Application Note 971 An Overview of LVDS Technology | 168 Kbytes | 5-Oct-98 | Download |
AN-971 (Japanese): Application Note 971 An Overview of LVDS Technology 640){this.height=this.height*640/this.width;this.width=640;}' border="0" alt=" Connection Diagram"> |
168 Kbytes | ||
AN-1110: Application Note 1110 LVDS Quad Dynamic I CC vs Frequency | 159 Kbytes | 4-Oct-04 | Download |
AN-1040: Application Note 1040 LVDS Performance: Bit Error Rate (BER) Testing Test Report [num]2 | 43 Kbytes | 4-Oct-04 | Download |
AN-977: Application Note 977 LVDS Signal Quality: Jitter Measurements Using Eye Patterns Test Report #1 | 63 Kbytes | 5-Oct-98 | Download |
AN-977 (Japanese): Application Note 977 LVDS Signal Quality: Jitter Measurements Using Eye Patterns Test Report #1 640){this.height=this.height*640/this.width;this.width=640;}' border="0" alt=" Connection Diagram"> |
104 Kbytes |
If you have trouble printing or viewing PDF file(s), see Printing Problems. |