DS28DG02

The DS28DG02 combines 2kb (256 x 8) EEPROM with 12 PIO lines, a real-time clock (RTC) and calendar with alarm function, a CPU reset monitor, a battery monitor, and a watchdog. Communication with the device is accomplished with an industrystandard SPI™ interface. The DS28DG02 user EEPROM is organized as four blocks of 64 bytes each with single-byte and up to 16-byte page write capability. Additional registers provide access to PIOs and to setup functions. Individual PIO lines can be configured as inputs or outputs. The power-on state of PIOs programmed as outputs is stored in nonvolatile (NV) memory. All PIOs DS28DG02 may be reconfigured by the user through the serial interface. The RTC/calendar operates in the 12/24-hour format and automatically corrects for leap years. Battery monitor threshold and watchdog timeout are userprogrammable through NV registers. The reset monitor generates a reset to the CPU if the voltage at the V_CC pin falls below the factory-set limit. The reset output includes a debounce circuit for manual pushbutton reset.