DS1746P

Features:

Integrated NV SRAM, real time clock,crystal, power-fail control circuit and lithium energy source
Clock registers are accessed identical to the static RAM. These registers are resident in the eight top RAM locations.
Century byte register; ie., Y2K compliant
Totally nonvolatile with over 10 years of operation in the absence of power
BCD coded century, year, month, date, day,hours, minutes, and seconds with automatic leap year compensation valid up to the year 2100
Battery voltage level indicator flag
Power-fail write protection allows for ±10% V_CC power supply tolerance
Lithium energy source is electrically disconnected to retain freshness until power is applied for the first time
DIP Module only
    -Standard JEDEC bytewide 128k x 8 static RAM pinout
PowerCap^®Module Board only
    -Surface mountable package for direct connection to PowerCap containing battery and crystal
    -Replaceable battery (PowerCap)
    -Power-On Reset Output
    -Pin for pin compatible with other densities of DS174XP Timekeeping RAM


Pinout




Specifications

Voltage on Any Pin Relative to Ground                                                 0.3V to +6.0V
Storage Temperature                                                                       40°C to +85°C
Soldering Temperature                  260°C for 10 seconds (DIP Package) (See Note 7)
                                  See IPC/JEDEC Standard J-STD-020A for  Surface Mount Devices


Description

The DS1746 is a full function, year 2000 compliant (Y2KC), real-time clock/calendar (RTC) and 128k x8 non-volatile static RAM. User access to all registers within the DS1746 is accomplished with a bytewide interface as shown in Figure 1. The Real Time Clock (RTC) information and control bits reside in the eight uppermost RAM locations. The RTC registers DS1746P contain century, year, month, date, day, hours,minutes, and seconds data in 24-hour BCD format. Corrections for the date of each month and leap year are made automatically.  The RTC clock registers are double buffered to avoid access of incorrect data that can occur during clock update cycles. The double buffered system also prevents time loss as the timekeeping countdown continues unabated by access to time register data. The DS1746 also contains its own power-fail circuitry which deselects the device when the V_CC supply is in an out of tolerance condition. This feature prevents loss of data from unpredictable system operation brought on by low V_CC as errant access and update cycles are avoided.