DP83953

Fully compliant with the IEEE 802.3 Repeater Specification
12 IEEE 802.3 10BASE-T compatible ports with built-in drivers and analog transmit filters; additional external isolation transformers are required to implement hubs
1 IEEE 802.3 compatible AUI port 
Cascadable for larger hub applications
On chip Elasticity Buffer, Manchester encoder and decoder
Separate Partition state machines for each port
Compatible with 802.3k Hub Management requirements
LED displays to provide port status information, including receive, collision, partition, jabber and link status,
Power-up configuration options
Repeater and Partition Specifications, Status Display,Processor Operations
Simple processor interface for repeater management and port disable.
On-chip Event Counters and Event Flag Arrays 
Serial Management Bus Interface to combine packet and repeater status information
Single 5V supply

The DP83953 Repeater Interface Controller with Security Features and Integrated Transmit Filters (RIC2A) is an enhanced version of the DP83952 Repeater Interface Controller with Security Features (RIC II). The RIC2A integrates driver and filter circuitry into the RIC II design.

The functionality of the RIC2A is essentially similar to the RIC II, but the pin definitions have been modified to reflect the added integrated drivers and filters. Additionally, the power and ground pin locations have been rearranged. Therefore, the DP83953 RIC2A is not a drop in replacement for the RIC ll.

The DP83953 RIC2A is National Semiconductor's managed repeater solution designed to comply with IEEE 802.3 Repeater Specifications. Segment partition and jabber lockup protection state machines are implemented in accordance with this standard. The DP83953 RIC2A has thirteen network interface ports available, including an AUI compatible port. The AUI port incorporates drivers to connect an external MAU using maximum length cable. Similarly, the other twelve interface ports integrate 10BASE-T transceivers with supporting driver and transmit filter circuitry.

The DP83953 RIC2A repeater consists of two major functional blocks: The segment specific block and the shared functional blocks. The segment specific block incorporates relevant IEEE specifications on a per port basis. The shared functional blocks incorporate core logic for the entire IEEE repeater unit. The core logic blocks consist of a repeater receive multiplexor, a phase locked loop (PLL), a Manchester decoder, an elasticity buffer, a transmit encoder and a demultiplexor.

A larger repeater system may be constructed by cascading several DP83953 RIC2A devices via the Inter-RIC bus. This methodof cascading allows the DP83953 RIC2A system to function as a single repeater unit without introducing additional repeater hops.

The DP83953 RIC2A is configurable for specific applications. It provides port status information for LED array displays and a simple interface for system processors. The DP83953 RIC2A possesses multifunctional counters and status flag arrays to facilitate network statistics gathering, as well as a serial Hub Management Interface Bus for collecting, event data in managed hub applications.