IC CTRLR ORIENT NETWORK 160PQFP
DP83936AVUL-20: IC CTRLR ORIENT NETWORK 160PQFP
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Features: ·16 10/100/1000 Mb/s Ethernet ports with non-blocking wire-speed performance·32 Gbit/s i...
Series: | - | Manufacturer: | National Semiconductor |
Controller Type: | Network Interface Controller (NIC) | Interface: | Twisted Pair |
Operating Supply Voltage : | 0.8 V to 5.5 V | Voltage - Supply: | 4.75 V ~ 5.25 V |
Current - Supply: | 140mA | Operating Temperature: | 0°C ~ 70°C |
Mounting Type: | Surface Mount | Package / Case: | 160-BQFP |
Supplier Device Package: | 160-PQFP (28x28) |
The SONIC-T (Systems-Oriented Network Interface Controller with Twisted Pair) is a second-generation Ethernet Controller designed to meet the demands of today's high-speed 32- and 16-bit systems. Its system interface operates with a high speed DMA that typically consumes less than 5% of the bus bandwidth. Selectable bus modes provide both big and little endian byte ordering and a clean interface to standard microprocessors. The linked-list buffer management system of DP83936AVUL-20 offers maximum flexibility in a variety of environments from PC-oriented adapters to high-speed motherboard designs. The DP83936AVUL-20 can be configured for full duplex operation. Furthermore, the DP83936AVUL-20 integrates a fully-compatible IEEE 802.3 Encoder/Decoder (ENDEC) and a Twisted Pair Interface which provide a one-chip solution for Ethernet when using 10BASE-T. When using 10BASE2 or 10BASE5, the DP83936AVUL-20 may be paired with the DP8392 Coaxial Transceiver Interface to achieve a simple 2-chip solution.
For increased performance, the DP83936AVUL-20 implements a unique buffer management scheme to efficiently process receive and transmit packets in system memory. No intermediate packet copy is necessary. The receive buffer management uses three areas in memory for (1) allocating additional resources, (2) indicating status information, and (3) buffering packet data. During reception, the DP83936AVUL-20 stores packets in the buffer area, then indicates receive status and control information in the descriptor area. The system allocates more memory resources to the DP83936AVUL-20 by adding descriptors to the memory resource area. The transmit buffer management uses two areas in memory:
1. indicating status and control information;
2. fetching packet data.
The system can create a transmit queue allowing multiple packets to be transmitted from a single transmit command. The packet data can reside on any arbitrary byte boundary and can exist in several non-contiguous locations.
Technical/Catalog Information | DP83936AVUL-20 |
Vendor | National Semiconductor |
Category | Integrated Circuits (ICs) |
Controller Type | Network Interface Controller |
Interface | Twisted Pair |
Voltage - Supply | 4.75 V ~ 5.25 V |
Current - Supply | 140mA |
Package / Case | 160-PQFP |
Packaging | Tube |
Operating Temperature | 0°C ~ 70°C |
Lead Free Status | Contains Lead |
RoHS Status | RoHS Non-Compliant |
Other Names | DP83936AVUL 20 DP83936AVUL20 |