DP83916

Features:

23-bit non-multiplexed address16-bit data bus
High-speed interruptible DMA
Linked-list buffer management maximizes flexibility
Two independent 32-byte transmit and receive FIFOs
Bus compatibility for all standard microprocessors
Supports big and little endian formats
Integrated IEEE 8023 ENDEC
Complete address filtering for up to 16 physical andor multicast addresses
32-bit general-purpose timer
Full-duplex loopback diagnostics
Fabricated in low-power CMOS
132 PQFP package
Full network management facilities support the IEEE 8023 layer management standard
Integrated support for bridge and repeater applications


Pinout




Specifications

SupplyVoltage(V_CC) ......................................-0.5Vto7.0V
DCInputVoltage(V_IN) ...........................-0.5VtoV_CC +0.5V
DCOutputVoltage(V_OUT) ......................-0.5VtoV_CC+ 0.5V
StorageTemperatureRange(T_STG) ...............-65to150
PowerDissipation(P_D).......................................... 500mW
LeadTemp(T_L)(Soldering10sec).............................. 260
ESD Rating
    (R_{ZAP ⁼}1.5kC_ZAP =120pF)................................... 1.5KV


Description

The SONIC^TM -16 (Systems-Oriented Network Interface Controller) is a second-generation Ethernet Controller de-
signed to meet the demands of today's high-speed 16-bit systems Its system interface operates with a high speed
DMA that typically consumes less than 8% of the bus band-width Selectable bus modes provide both big and little endi- an byte ordering and a clean interface to standard micro-processors The linked-list buffer management system of SONIC-16 offers maximum flexibility in a variety of environ-ments from PC-oriented adapters to high-speed mother-
board designs Furthermore the SONIC-16 integrates a ful-ly-compatible IEEE 8023 EncoderDecoder (ENDEC) al-lowing for a simple 2-chip solution for Ethernet when the SONIC-16 is paired with the DP8392 Coaxial Transceiver Interface

For increased performance the SONIC-16 implements a unique buffer management scheme to efficiently process receive and transmit packets in system memory No inter- mediate packet copy is necessary The receive buffer man-
agement uses three areas in memory for (1) allocating addi-tional resources (2) indicating status information and (3)
buffering packet data During reception the SONIC-16 stores packets in the buffer area then indicates receive status and control information in the descriptor area The system allocates more memory resources to the SONIC-16 by adding descriptors to the memory resource area The transmit buffer management uses two areas in memory one for indicating status and control information and the other for fetching packet data The system can create a transmit queue allowing multiple packets to be transmitted from a single transmit command The packet data can re-side on any arbitrary byte boundary and can exist in several non-contiguous locations