DP83816 Selling Leads, Price trend, DP83816 DataSheet download, circuit diagram from SeekIC.com

Features: - IEEE 802.3 Compliant, PCI V2.2 MAC/BIU supports traditional data rates of 10 Mb/s Ethernet and 100 Mb/s Fast Ethernet (via internal phy)- Bus master - burst sizes of up to 128 dwords (512 bytes)- BIU compliant with PC 97 and PC 98 Hardware Design Guides, PC 99 Hardware Design Guide dra...

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SeekIC No. : 004327943 Detail

DP83816: Features: - IEEE 802.3 Compliant, PCI V2.2 MAC/BIU supports traditional data rates of 10 Mb/s Ethernet and 100 Mb/s Fast Ethernet (via internal phy)- Bus master - burst sizes of up to 128 dwords (51...

DP83816 Data Sheet

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Part Number:: DP83816
Supply Ability:: 5000

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1~5000

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Negotiable

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Upload time: 2024/11/21

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Product Details

Description

Features:

- IEEE 802.3 Compliant, PCI V2.2 MAC/BIU supports
    traditional data rates of 10 Mb/s Ethernet and 100 Mb/s
    Fast Ethernet (via internal phy)
- Bus master - burst sizes of up to 128 dwords (512 bytes)
- BIU compliant with PC 97 and PC 98 Hardware Design
    Guides, PC 99 Hardware Design Guide draft, ACPI v1.0,
    PCI Power Management Specification v1.1, OnNow
    Device Class Power Management Reference
    Specification - Network Device Class v1.0a
- Wake on LAN (WOL) support compliant with PC98,
    PC99, SecureOn, and OnNow, including directed
    packets, Magic Packet, VLAN packets, ARP packets,
    pattern match packets, and Phy status change
- Clkrun function for PCI Mobile Design Guide
- Virtual LAN (VLAN) and long frame support
- Support for IEEE 802.3x Full duplex flow control
- Extremely flexible Rx packet filtration including: single
    address perfect filter with MSb masking, broadcast, 512
    entry multicast/unicast hash table, deep packet pattern
    matching for up to 4 unique patterns
- Statistics gathered for support of RFC 1213 (MIB II),
    RFC 1398 (Ether-like MIB), IEEE 802.3 LME, reducing
    CPU overhead for management
- Internal 2 KB Transmit and 2 KB Receive data FIFOs
- Serial EEPROM port with auto-load of configuration data from EEPROM at power-on
- Flash/PROM interface for remote boot support
- Fully integrated IEEE 802.3/802.3u 3.3V CMOS physical layer
- IEEE 802.3 10BASE-T transceiver with integrated filters
- IEEE 802.3u 100BASE-TX transceiver
- Fully integrated ANSI X3.263 compliant TP-PMD
    physical sublayer with adaptive equalization and Baseline Wander compensation
- IEEE 802.3u Auto-Negotiation - advertised features configurable via EEPROM
- Full Duplex support for 10 and 100 Mb/s data rates
- Single 25 MHz reference clock
- 144-pin LQFP package
- Low power 3.3V CMOS design with typical consumption
    of 383 mW operating, 297 mW during WOL and 53 mW during sleep mode
- IEEE 802.3u MII for connecting alternative external Physical Layer Devices
- 3.3V signalling with 5V tolerant I/O.

Pinout

Connection Diagram

Specifications

Supply Voltage (VDD) .......................................-0.5 V to 3.6 V
DC Input Voltage (VIN) .....................................-0.5 V to 5.5 V
DC Output Voltage (VOUT) ....................-0.5 V to VDD + 0.5 V
Storage Temperature Range (TSTG)............ -65 °C to 150 °C
Power Dissipation (PD) ..............................................504 mW
Lead Temp. (TL) (Soldering, 10 sec) ............................260 °C
ESD Rating (RZAP = 1.5k, CZAP = 120 pF)..................2.0 KV
ESD for TPTD + pins only...............................................1.0 KV
ja (@0 cfm, 0.5 Watt) ...........................................46.4 °C/W
jc (@1 Watt) .........................................................9.29 °C/W

Description

DP83816 is a single-chip 10/100 Mb/s Ethernet Controller for the PCI bus. It is targeted at low-cost, high volume PC motherboards, adapter cards, and embedded systems. The DP83816 fully implements the V2.2 33 MHz PCI bus interface for host communications with power management support. Packet descriptors and data are transferred via bus-mastering, reducing the burden on the host CPU. The DP83816 can support full duplex 10/100 Mb/s transmission and reception, with minimum interframe gap.

The DP83816 device is an integration of an enhanced version of the National Semiconductor PCI MAC/BIU (Media Access Controller/Bus Interface Unit) and a 3.3V CMOS physical layer interface.

DP83816

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