DM9602

Features:

 70 ns to  output width range
 Resettable and retriggerable-0% to 100% duty cycle
 TTL input gatingÐleading or trailing edge triggering
 Complementary TTL outputs
 Optional retrigger lock-out capability
 Pulse width compensated for V_CC and temperature variations
 Alternate Military/Aerospace device (54xxx) is available.Contact a National Semiconductor Sales Office/Distributorfor specifications.


Specifications

If Military/Aerospace specified devices are required,please contact the National Semiconductor SalesOffice/Distributors for availability and specifications.

Supply Voltage                                                               7V
Input Voltage                                                              5.5V
Operating Free Air Temperature Range
        Military                                             -55 to +125
        Commercial                                             0 to +70
Storage Temperature Range                   -65 to +150

Note: The ``Absolute Maximum Ratings'' are those valuesbeyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. Theparametric values defined in the ``Electrical Characteristics''table are not guaranteed at the absolute maximum ratings.The ``Recommended Operating Conditions'' table will definethe conditions for actual device operation.


Description

These DM9602 dual resettable, retriggerable one shots have two inputsper function; one which is active high, and one which is active low. This allows the designer to employ either leading-edge or trailing-edge triggering, which is independent of input transition times. When input conditions for triggeringare met, a new cycle starts and the external capacitor is allowed to rapidly discharge and then charge again. The DM9602 retriggerable feature permits output pulse widths to beextended. In fact a continuous true output can be maintained by having an input cycle time which is shorter than the output cycle time. The output pulse may then be terminated at any time by applying a low logic level to the RESET pin. Retriggering may be inhibited by either connecting the Q output to an active high input, or the Q output to an active low input.