DM9316

Features: Internal look-ahead for fast countingCarry output for n-bit cascadingSynchronous countingLoad control lineDiode-clamped inputsTypical clock frequency 35 MHzPin-for-pin replacements popular 54/74 counters 5416A/7416A (binary)Alternate Military/Aerospace device (9316) is available.Contact ...

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SeekIC No. : 004327375 Detail

DM9316: Features: Internal look-ahead for fast countingCarry output for n-bit cascadingSynchronous countingLoad control lineDiode-clamped inputsTypical clock frequency 35 MHzPin-for-pin replacements popular...

floor Price/Ceiling Price

Part Number:
DM9316
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

 Internal look-ahead for fast counting
 Carry output for n-bit cascading
 Synchronous counting
 Load control line
 Diode-clamped inputs
Typical clock frequency 35 MHz
Pin-for-pin replacements popular 54/74 counters 5416A/7416A (binary)
 Alternate Military/Aerospace device (9316) is available.Contact a National Semiconductor Sales Office/Distributor for specifications.



Specifications

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.

Supply Voltage                                                      7V
Input Voltage                                                     5.5V
Operating Free Air Temperature Range
   Military                                         -55 to +125
   Commercial                                         0 to +70
Storage Temperature Range          -65 to +150

Note: The ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed.
The device should not be operated at these limits. The parametric values defined in the ``Electrical Characteristics'' table are not guaranteed at the absolute maximum ratings. The ``Recommended Operating Conditions'' table will define the conditions for actual device operation.



Description

These DM9316 synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting
designs. The DM9316 is a 4-bit binary counter. The carry output is decoded by means of a NOR gate, thus preventing spikes
during the normal counting mode of operation. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs of DM9316 change coincident with each other when so instructed by the count-enables inputs and internal gating. This mode of operating eliminates the output counting spikes which are normally associated with asynchronous (ripple clock) counters. A buffered clock input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform.

These DM9316 counters are fully programmable; that is, the outputs may be preset to either level. As presetting is synchronous,
setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after
the next clock pulse regardless of the levels of the enable input. Low-to-high transitions at the load input are perfectly
acceptable regardless of the logic levels on the clock or enable inputs. The clear function is asynchronous and a low level at the clear input sets of the flip-flop outputs low regardless of the levels of clock, load, or enable inputs.

The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count-enable inputs and a ripple carry output of DM9316. Both countenable inputs (P and T) must be high to count, and input T is fed-forward to enable the ripple carry output. The ripple carry output thus enabled will produce a high-level output pulse with a duration approximately equal to the high-level portion of the QA output. This high-level overflow ripple carry pulse can be used to enable successive cascaded stages. Highto-low level transitions at the enable P or T inputs may occur regardless of the logic level in the clock.


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