DM74LS395

Features: · Shift right or parallel 4-bit register· TRI-STATE outputs· Input clamp diodes limit high speed termination effects· Fully CMOS and TTL compatiblePinoutSpecificationsSupply Voltage ..........................................................7VInput Voltage ...................................

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DM74LS395 Picture
SeekIC No. : 004327268 Detail

DM74LS395: Features: · Shift right or parallel 4-bit register· TRI-STATE outputs· Input clamp diodes limit high speed termination effects· Fully CMOS and TTL compatiblePinoutSpecificationsSupply Voltage .........

floor Price/Ceiling Price

Part Number:
DM74LS395
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/28

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Product Details

Description



Features:

· Shift right or parallel 4-bit register
· TRI-STATE outputs
· Input clamp diodes limit high speed termination effects
· Fully CMOS and TTL compatible



Pinout

  Connection Diagram


Specifications

Supply Voltage ..........................................................7V
Input Voltage ............................................................7V
Operating Free Air Temperature Range ...0°C to +70°C
Storage Temperature Range ..............-65°C to +150°C

Note: The ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ``Electrical Characteristics'' table are not guaranteed at the absolute maximum ratings. The ``Recommended Operating Conditions'' table will define the conditions for actual device operation.




Description

The DM74LS395 is a 4-bit shift register with TRI-STATE outputs and can operate in either a synchronous parallel load or a serial shift-right mode, as determined by the Select input. An asynchronous active LOW Master Reset (MR) input overrides the synchronous operations and clears the DM74LS395 register. An active LOW Output Enable (OE) input controls the TRISTATE output buffers, but does not interfere with the other operations. The fourth stage also has a conventional output for linking purposes in multi-stage serial operations.




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