DM74LS259

Features: 8-Bit parallel-out storage register performs serial-to-par-allel conversion with storage Asynchronous parallel clear Active high decoder Enable/disable input simplifies expansion Direct replacement for Fairchild DM9334 Expandable for N-bit applications Four distinct functional modes Typi...

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SeekIC No. : 004327237 Detail

DM74LS259: Features: 8-Bit parallel-out storage register performs serial-to-par-allel conversion with storage Asynchronous parallel clear Active high decoder Enable/disable input simplifies expansion Direct re...

floor Price/Ceiling Price

Part Number:
DM74LS259
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

 8-Bit parallel-out storage register performs serial-to-par-allel conversion with storage
Asynchronous parallel clear
Active high decoder
Enable/disable input simplifies expansion
Direct replacement for Fairchild DM9334
Expandable for N-bit applications
Four distinct functional modes
Typical propagation delay times: 
   Enable-to-output 18 ns
   Data-to-output 16 ns
   Address-to-output  21 ns
   Clear-to-output  17 ns
Fan-out
   IOL (sink current)  8 mA
   IOH (source current) −0.4 mA
Typical ICC 22 mA



Specifications

Supply Voltage                                                                  7V
Input Voltage                                                                    7V
Operating Free Air Temperature Range           0°C to +70°C
Storage Temperature Range                     −65°C to +150°C



Description

These DM74LS259 8-bit addressable latches are designed for general purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers,and active-high decoders or demultiplexers. DM74LS259 are mul-tifunctional devices capable of storing single-line data in eight addressable latches, and being a 1-of-8 decoder or demultiplexer with active-high outputs.

Four distinct modes of operation are selectable by control-ling the clear and enable inputs as enumerated in the func-tion table. In the addressable-latch mode, data at the data-in terminal is written into the addressed latch. The DM74LS259 addressed latch will follow the data input with all unad-dressed latches remaining in their previous states. In the memory mode, all latches remain in their previous states and are unaffected by the data or address inputs. To elimi-nate the possibility of entering erroneous data in the latches, the enable should be held HIGH (inactive) while the address lines are changing. In the 1-of-8 decoding or demultiplexing mode, the addressed output will follow the level of the D input with all other outputs LOW. In the clear mode, all outputs are LOW and unaffected by the address and data inputs.
 




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