DM74LS258B

Features: TRI-STATE versions LS157 and LS158 with same pin-outsSchottky-clamped for significant improvement in A-C performanceProvides bus interface from multiple sources in high-performance systemsAverage propagation delay from data input 12nsTypical power dissipationLS257B 50 mWLS258B 35 mWAlter...

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SeekIC No. : 004327236 Detail

DM74LS258B: Features: TRI-STATE versions LS157 and LS158 with same pin-outsSchottky-clamped for significant improvement in A-C performanceProvides bus interface from multiple sources in high-performance systems...

floor Price/Ceiling Price

Part Number:
DM74LS258B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

TRI-STATE versions LS157 and LS158 with same pin-outs
Schottky-clamped for significant improvement in A-C performance
Provides bus interface from multiple sources in high-performance systems
Average propagation delay from data input 12ns
Typical power dissipation
LS257B 50 mW
LS258B 35 mW
Alternate military/aerospace  devices (54LS257A/54LS258A)are available. Contact a National Semicon-ductor Sales Office/Distributor for specifications.



Specifications

Supply Voltage                                           7V
Input Voltage                                             7V
Operating Free Air Temperature Range
DM54L Sand 54LS                  -55 to +125
DM74L                                         0 to +70
Storage Temperature Range  -65 to +150

 



Description

These DM74LS258B Schottky-clamped high-performance multiplexers feature TRI-STATE outputs that can interface directly with data lines of bus-organized systems.With all but one of the common outputs disabled(at a high impedance state),the low impedance of the single enabled output will drive the bus line to a high or low logic level.To minimize the possibil-ity that two outputs of DM74LS258B will at tempt to take a common bus to opposite logic levels ,the output enable circuitry is designed such that the output disable times are shorter than the out- put enable times.

This TRI-STATE output feature means that n-bit(paralleled) data selectors with up to 258 sources can be implemented for data buses. It also permits the use of standard TTL reg-isters for data retention throughout the system.




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