DM74LS194A

Features: Parallel inputs and outputsFour operating modes Synchronous parallel load Right shift Left shift Do nothingPositive edge-triggered clockingDirect overriding clearSpecificationsSupplyVoltage................................................................. 7VInputVoltage .....................

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SeekIC No. : 004327224 Detail

DM74LS194A: Features: Parallel inputs and outputsFour operating modes Synchronous parallel load Right shift Left shift Do nothingPositive edge-triggered clockingDirect overriding clearSpecificationsSupplyVoltag...

floor Price/Ceiling Price

Part Number:
DM74LS194A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/25

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Product Details

Description



Features:

Parallel inputs and outputs
Four operating modes
      Synchronous parallel load
      Right shift
      Left shift
      Do nothing
Positive edge-triggered clocking
Direct overriding clear



Specifications

SupplyVoltage................................................................. 7V
InputVoltage ...................................................................7V
Operating Free Air Temperature Range
   54LS ..........................................................-55to +125
   DM74LS ...........................................................0to +70
StorageTemperatureRange........................... -65to+ 150



Description

This DM74LS194A bidirectional shift register is designed to incorporate virtually all of the features a system designer may want in a
shift register DM74LS194A feature parallel inputs parallel outputs right-shift and left-shift serial inputs operating-mode-control
nputs and a direct overriding clear line The register has our distinct modes of operation namely: Parallel (broadside) load right (in the direction QA toward QD) Shift left (in the direction QD toward QA) Inhibit clock (do nothing)Synchronous parallel loading is accomplished by applying he four bits of data and taking both mode control inputs S0
and S1 high The data is loaded into the associated flip- lops and appear at the outputs after the positive transition
of the clock input During loading serial data flow is inhibited

Shift right of DM74LS194A is accomplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is lowSerial data for this mode is entered at the shift-right data input When S0 is low and S1 is high data shifts left synchronously and new data is entered at the shift-left serial input

Clocking of the DM74LS194A flip-flop is inhibited when both mode control inputs are low


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