DM74AS874

Supply Voltage ..........................................................7V
Input Voltage ............................................................7V
Voltage Applied to Disabled Output .......................5.5V
Operating Free Air Temperature Range ...0°C to +70°C
Storage Temperature Range ..............-65°C to +150°C
Typical _JA N Package ....................................47.0°C/W

Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.

These dual 4-bit inverting registers of DM74AS874 feature totem-pole 3-STATE outputs designed specifically for driving highlycapacitive or relatively low-impedance loads. The highimpedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the DM74AS874 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs.

A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly.

The output control of DM74AS874 does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF.

The pinout is arranged to ease printed circuit board layout. All data inputs are on one side of the package, while all
outputs are on the other side.