DM74AS245N

Number of Channels per Chip : 8
Output Type : 3-State
Low Level Output Current : 48 mA
Maximum Operating Temperature : + 70 C
Packaging : Tube
Supply Voltage - Max : 5.5 V
Supply Voltage - Min : 4.5 V
Logic Type : Bipolar
Input Level : TTL
Output Level : TTL
High Level Output Current : - 15 mA
Package / Case : PDIP-20
Propagation Delay Time : 7.5 ns
Logic Family : DM74AS


Features:

·  Advanced oxide-isolated, ion-implanted Schottky
   TTL process
·  Non-inverting logic output
·  3-STATE outputs independently controlled on
   A and B buses
·  Low output impedance to drive terminated transmission
   lines to 133W
·  Switching response specified into 500W/50 pF
·  Specified to interface with CMOS at VOH = VCC - 2V
·  PNP inputs reduce input loading
·  Switching specifications guaranteed over full
   temperature and VCC range


Pinout




Specifications

Supply Voltage, V_CC .................................................7V
Input Voltage
Control Inputs ..........................................................7V
I/O Ports ................................................................5.5V
Operating Free Air Temperature Range..... 0°C to 70°C
Storage Temperature Range ..............-65°C to +150°C
Typical qJA
N Package ......................................................51.5°C/W
M Package ......................................................76.0°C/W
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.


Description

This advanced Schottky device,DM74AS245N contains 8 pairs of 3-STATE logic elements configured as octal bus transceivers. These DM74AS245N circuits are designed for use in memory, microprocessor systems and in asynchronous bidirectional data buses. Two way communication between buses is controlled by the (DIR) input. Data transmits either from the A bus to the B bus or from the B bus to the A bus. Both the driver and receiver outputs can be disabled via the (G) enable input which causes outputs to enter the high impedance mode so that the buses are effectively isolated.