Flip Flops Dl 4-Bit D Flip-Flop
DM74ALS874BWM: Flip Flops Dl 4-Bit D Flip-Flop
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Number of Circuits : | 2 | Logic Family : | 74ALS | ||
Logic Type : | D-Type Edge Triggered Flip-Flop | Polarity : | Non-Inverting | ||
Input Type : | Single-Ended | Output Type : | Single-Ended | ||
Propagation Delay Time : | 14 ns | High Level Output Current : | - 2.6 mA | ||
Low Level Output Current : | 24 mA | Supply Voltage - Max : | 5.5 V | ||
Maximum Operating Temperature : | + 70 C | Mounting Style : | SMD/SMT | ||
Package / Case : | SOIC-24 | Packaging : | Tube |
This DM74ALS874BWM dual 4-bit register features totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide this DM74ALS874BWM register with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. It is particularly attractive forimplementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the DM74ALS874BWM are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs.
A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs DM74ALS874BWM neither load nor drive the bus lines significantly.
The output control DM74ALS874BWM does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF.