DM74ALS646WM

Bus Transceivers Oct 3-STATE Tran Reg

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DM74ALS646WM Picture
SeekIC No. : 00417803 Detail

DM74ALS646WM: Bus Transceivers Oct 3-STATE Tran Reg

floor Price/Ceiling Price

Part Number:
DM74ALS646WM
Mfg:
Fairchild Semiconductor
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/29

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Product Details

Quick Details

Logic Type : Bipolar Logic Family : 74ALS
Number of Channels per Chip : 8 Input Level : TTL
Output Level : TTL Output Type : 3-State
High Level Output Current : - 15 mA Low Level Output Current : 24 mA
Propagation Delay Time : 30 ns Supply Voltage - Max : 5.5 V
Maximum Operating Temperature : + 70 C Package / Case : SOIC-24
Packaging : Tube    

Description

Supply Voltage - Min :
Number of Channels per Chip : 8
Output Type : 3-State
Maximum Operating Temperature : + 70 C
Package / Case : SOIC-24
Packaging : Tube
Supply Voltage - Max : 5.5 V
Low Level Output Current : 24 mA
Logic Type : Bipolar
Logic Family : 74ALS
Input Level : TTL
Output Level : TTL
High Level Output Current : - 15 mA
Propagation Delay Time : 30 ns


Features:

· Switching specifications at 50 pF
· Switching specifications guaranteed over full temperature and VCC range
· Advanced oxide-isolated, ion-implanted Schottky TTL process
· 3-STATE buffer outputs drive bus lines directly
· Multiplexed real-time and stored data
· Independent registers for A and B buses



Pinout

  Connection Diagram


Specifications

Supply Voltage ..........................................................7V
Input Voltage
Control Inputs.......................................................... 7V
I/O Ports............................................................... 5.5V
Operating Free-Air Temperature Range.. 0°C to +70°C
Storage Temperature Range ............−65°C to +150°C
Typical JA
N Package .....................................................44.5°C/W
M Package ....................................................80.5°C/W
Note 2: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.



Description

This DM74ALS646WM device incorporates an octal bus transceiver and an octal D-type register configured to enable multiplexed transmission of data from bus to bus or internal register to bus.

This bus transceiver,DM74ALS646WM  features totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic level drive provides this device with the capability of being connected directly to and driving the bus lines in a bus-organized system without the need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The DM74ALS646WM registers in the DM74ALS646 are edge-triggered Dtype flip-flops. On the positive transition of the clock (CAB or CBA), the input bus data is stored into the appropriate register. The CAB input controls the transfer of data into the A register and the CBA input controls the B register.

The SAB and SBA control pins are provided to select whether real-time data or stored data is transferred. A LOW input level selects real-time data, and a HIGH level selects stored data. The select controls have a "make before break" configuration to eliminate a glitch which would normally occur in a typical multiplexer during the transition between store and real-time data.

The enable G and direction control pins provide four modes of operation: real-time data transfer from bus A to B, realtime data transfer from bus B to A, real-time bus A and/or B data transfer to internal storage, or internally stored data transfer to bus A or B.

When the enable G pin is LOW, the direction pin of DM74ALS646WM selects which bus receives data. When the enable G pin is HIGH, both buses become disabled yet their input function is still enabled.




Parameters:

Technical/Catalog InformationDM74ALS646WM
VendorFairchild Semiconductor
CategoryIntegrated Circuits (ICs)
Number of Drivers/Receivers8/8
TypeTransceiver
Voltage - Supply3.3V
Package / Case24-SOIC
PackagingTube
Protocol-
Lead Free StatusContains Lead
RoHS StatusRoHS Non-Compliant
Other Names DM74ALS646WM
DM74ALS646WM



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