DM74ALS580A

Supply Voltage .........................................................................7V
Input Voltage ...........................................................................7V
Voltage Applied to Disabled Output ......................................5.5V
Operating Free Air Temperature Range................ 0°C to +70°C
Storage Temperature Range ...........................-65°C to +150°C
Typical qJA
N Package................................................................... 56.0°C/W
M Package................................................................... 75.0°C/W

DM74ALS580A Octal D-Type Transparent Latch withGeneral Description These DM74ALS580A 8-bit registers feature totem-pole 3-STATE outputsdesigned specifically for driving highly-capacitive or relatively  low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectionalbus drivers, and working registers.

The eight inverting latches of the DM74ALS580A are transparent D-type latches. While the enable (G) is HIGH the Q outputs will follow the complement of the data (D) inputs. When the enable is taken LOW the output will be latched at the complement of the level of the data that was set up.A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance  state the outputs of DM74ALS580A neither load nor drive the bus linessignificantly.

The output control does not affect the internal operation of the latches of DM74ALS580A. That is, the old data can be retained or new data can be entered even while the outputs of DM74ALS580A are OFF.