DM74ALS563A

Switching specifications at 50 pF
Switching specifications guaranteed over full temperature and VCC range
Advanced oxide-isolated, ion-implanted Schottky TTL process
3-STATE buffer-type outputs drive bus lines directly

Supply Voltage                                                                     7V
Input Voltage                                                                       7V
Voltage Applied to Disabled Output                                  5.5V
Operating Free Air Temperature Range                0 to +70
Storage Temperature Range                            -65to +150
Typical JA
N Package                                                                  56.0/W
M Package                                                                  75.0/W

Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.

These DM74ALS563A 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these DM74ALS563A registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight inverting latches of the DM74ALS563A are transparent D-type latches. While the enable (G) is HIGH the Q outputs will follow the data (D) inputs. When the enable is taken LOW the output will be latched at the complement of the level of the data that was set up.

A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs of  DM74ALS563A  neither load nor drive the bus lines significantly.

The output control does not affect the internal operation of the latches. That is, the old data can be retained or new data can be entered even while the outputs are OFF.