DM74ALS253M

Mounting Style : SMD/SMT
Package / Case : SOIC-16
Supply Voltage - Max : 5.5 V
Supply Voltage - Min : 4.5 V
Packaging : Tube
Product : Decoders, Encoders, Multiplexers & Demultiplexers
Number of Lines (Input / Output) : 1 / 4
Maximum Operating Temperature : + 70 C
Number of Bits : 2
Propagation Delay Time : 14 ns at 4.5 V to 5.5 V
Logic Family : 74A


Features:

·  Advanced oxide-isolated, ion-implanted Schottky TTL process
·  Switching performance is guaranteed over full temperature
   and VCC supply range
·  Pin and functional compatible with LS family counterpart
·  Improved output transient handling capability
·  Output control circuitry incorporates power-up 3-STATE feature


Pinout




Specifications

Supply Voltage, V_CC ......................................................7V
Input Voltage ................................................................7V
Voltage Applied to Disabled Output ...........................5.5V
Operating Free Air Temperature Range .......0°C to +70°C
Storage Temperature Range.................. -65°C to +150°C
Typical qJA
N Package ..........................................................78.0°C/W
M Package........................................................ 107.0°C/W
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.


Description

This DM74ALS253M Data Selector/Multiplexer contains full on-chip decoding to select one-of-four data sources as a result of a unique two-bit binary code at the Select Inputs. Each of the two Data Selector/Multiplexer circuits,including DM74ALS253M have their own separate Data and Output Control inputs and a non-inverting 3- STATE output buffer. The Output Control inputs, when at the high level, place the corresponding output in the high impedance OFF-State. In order to prevent bus access conflicts, output disable times are shorter than output enable times. The Select input buffers incorporate internal overlap features to ensure that select input changes do not cause invalid output transients.