DM74ALS125

  This DM74ALS125 device contains four independent gates each of which performs a non-inverting buffer function. The outputs of DM74ALS125  have the 3-STATE feature. The 3-STATE circuitry contains a fea-ture that maintains the buffer outputs in 3-STATE (high impedance state) during power supply ramp-up or ramp-down. This eliminates bus glitching problems that arise during power-up and power-down. To minimize the possi-
bility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputsof DM74ALS125.