DM74ALS109A

Features: *Switching specifications at 50 pF*Switching specifications guaranteed over full tempera-ture and VCC range*Advanced oxide-isolated, ion-implanted Schottky TTL process*Functionally and pin for pin compatible with Schottky and LS TTL counterpart*Improved AC performance over LS109 at appro...

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SeekIC No. : 004327088 Detail

DM74ALS109A: Features: *Switching specifications at 50 pF*Switching specifications guaranteed over full tempera-ture and VCC range*Advanced oxide-isolated, ion-implanted Schottky TTL process*Functionally and pin...

floor Price/Ceiling Price

Part Number:
DM74ALS109A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

*Switching specifications at 50 pF
*Switching specifications guaranteed over full tempera-ture and VCC  range
*Advanced oxide-isolated, ion-implanted Schottky TTL process
*Functionally and pin for pin compatible with Schottky and LS TTL counterpart
*Improved AC performance over LS109 at approximately half the power



Specifications

Supply Voltage                                                           7V
Input Voltage                                                             7V
Operating Free Air Temperature Range        0 to , 70
Storage Temperature Range                   -65 to , 150
Typical JA
N Package                                                          82.5/W
M Package                                                        111.5/W

Note 2:  The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings.The "Recommended Operating Conditions" table will define the conditions for actual device operation.




Description

 The DM74ALS109A is a dual edge-triggered flip-flop. Eac flip-flop has individual J, K, clock, clear and preset inputs and also complementary Q and Q outputs.

  Information at input J or K is transferred to the Q output of DM74ALS109A on the positive going edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive going pulse. When the clock input is at either the HIGH or LOW level, the J, K input signal has no effect.

  Asynchronous preset and clear inputs will set or clear Q output of DM74ALS109A respectively upon the application of low level signal.The J-K design allows operation as a D flip-flop by tying the J and K inputs together.




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