DM54LS469

The DM54LS469  is an 8-bit synchronous up/down counter with parallel load and hold capability. Three function-select in-puts (LD,UD, CBI) provide one of four operations which occur synchronously on the rising edge of the clock (CK).

The LOAD operation loads the inputs (D7±D0) into the out-put register (Q7±Q0). The HOLD operation holds the previ-ous value regardless of clock transitions. The INCREMENT operation adds one to the output register when the carry-in input is TRUE (CBIeLOW), otherwise the operation is a HOLD. The carry-out (CBO) is TRUE (CBOeLOW) when the output register (Q7±Q0) is all HIGHs, otherwise FALSE (CBOeHIGH). The DECREMENT operation subtracts one from the output register when the borrow-in input is TRUE (CBIeLOW), otherwise the operation is a HOLD. The bor-row-out (CBO) is TRUE (CBOeLOW) when the output reg-ister (Q7±Q0) is all LOWs, otherwise FALSE (CBOeHIGH).The output register (Q7±Q0) is enabled when OE is LOW,and disabled (HI-Z) when OE is HIGH. The output drivers will sink the 24 mA required for many bus-interface stan-dards. Two or more DM54LS469 octal up/down counters may be cascaded to provide larger counters.