DM54194

  This DM54194 bidirectional shift register is designed to incorporate virtually all of the features a system designer may want in a shift register it features parallel inputs parallel outputs right-shift and left-shift serial inputs operating-mode-control inputs and a direct overriding clear line.

 The DM54194 register has four distinct modes of operation namely

Parallel (broadside) load
Shift right (in the direction Q_A toward Q_D)
Shift left (in the direction Q_D toward Q_A)
Inhibit clock (do nothing)

  Synchronous parallel loading of DM54194 is accomplished by applying the four bits of data and taking both mode control inputs S0 and S1 high. The data is loaded into the associated flip-flops and appears at the outputs after the positive transition of the clock input. During loading serial data flow is inhibit-ed

  Shift right of DM54194 is accomplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is low Serial data for this mode is entered at the shift-right data input When S0 is low and S1 is high data shifts left syn-chronously and new data is entered at the shift-left serial input

  Clocking of the flip-flop of DM54194 is inhibited when both mode control inputs are low The mode controls of the DM54194 DM74194 should be changed only while the clock input is high