DG526

Features: • Direct RESET• TTL and CMOS Compatible Address and Enable Inputs• Maximum Power Supply Rating . . . . . . . . . . . . . . . .44V• Break-Before-Make Switching• Alternate SourceApplication• Data Acquisition Systems• Communication Systems• Au...

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DG526 Picture
SeekIC No. : 004326298 Detail

DG526: Features: • Direct RESET• TTL and CMOS Compatible Address and Enable Inputs• Maximum Power Supply Rating . . . . . . . . . . . . . . . .44V• Break-Before-Make Switching•...

floor Price/Ceiling Price

Part Number:
DG526
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

• Direct RESET
• TTL and CMOS Compatible Address and Enable Inputs
• Maximum Power Supply Rating . . . . . . . . . . . . . . . .44V
• Break-Before-Make Switching
• Alternate Source



Application

• Data Acquisition Systems
• Communication Systems
• Automatic Test Equipment
• Microprocessor Controlled Systemd



Pinout

  Connection Diagram


Specifications

V+ to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-25V
VIN to Ground (Note 1). . . . . . . . . . . . .  . . . . . . (V- - 2V), (V+ + 2V)
VS or VD to V+ (Note 1) . . . . . . . . . . . . .. . . . . . . . . . .+2V, (V- - 2V)
VS or VD to V- (Note 1). . . . . . . . . . . . . . .. . . . . . . . . -2V, (V+ + 2V)
Current, Any Terminal Except S or D . . . . . . . . . . . . . . . . . . . .30mA
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .20mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40mA
(Pulsed at 1ms, 10% Duty Cycle Max)



Description

The DG526, DG527, DG528, and DG529 are CMOS Monolithic 16-Channel/Dual 4-Channel Analog Multiplexers. Each device has on-chip address and control latches to simplify design in microprocessor based applications. The DG526 uses 4 address lines to control its 16 channels; the DG527, DG528 both use 3 address lines to control their 8 channels; and the DG529 uses 2 address lines to control its 4 channels. The enable pin is used to enable the address latches during the WR pulse. It can be hard wired to the logic supply if one of the channels will always be used (except during a reset) or it can be tied to address decoding circuitry for memory mapped operation. The RS pin is used to clear all latches regardless of the state of any other latch or control line. The WR pin is used to transfer the state of the address control lines to their latches, except during a reset or when EN is low.

A channel in the ON state conducts signals equally well in both directions. In the OFF state each channel blocks voltages up to the supply rails. The address inputs, WR, RS and the enable input are TTL and CMOS compatible over the full specified operation temperature range.                         




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