DAC813

· The DAC813 interface logic allows easy interface to microcomputer bus structures. The control signal is derived from external device select logic and the I/O Write or Memory Write (depending upon the system design) signals from the microcomputer.
· The latch enable lines LMSB, LLSB, and LDAC determine which of the latches are selected. It is permissible to enable two or more latches simultaneously, as shown in some of the following examples.
· The double-buffered latch permits data to be loaded into the input latches of several DAC813s and later strobed into the D/A latch of all D/As, simultaneously updating all analog outputs. All the interface schemes shown below use a base address decoder. If blocks of memory are used, the base address decoder can be simplified or eliminated altogether.

+VCC to ACOM .......................................................................... 0 to +18V
VCC to ACOM .......................................................................... 0 to 18V
+VCC to VCC ........................................................................... 0 to +36V
DCOM with respect to ACOM .............................................................. ±4V
Digital Inputs (Pins 1115, 1728) to DCOM ..................... 0.5V to +VCC
External Voltage Applied to BPO Span Resistor ............................... ±VCC
VREF OUT ........................................................... Indefinite Short to ACOM
VOUT .................................................................. Indefinite Short to ACOM
Power Dissipation .......................................................................... 750mW
Lead Temperature (soldering, 10s) ............................................... +300°C
Max Junction Temperature ............................................................. +165°C
Thermal Resistance, qJ-A:Plastic DIP and SOIC ........................... 130°C/W
Ceramic DIP ................................................................................... 85°C/W

NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

The DAC813 is a complete monolithic 12-bit digitalto- analog converter with a flexible digital interface. It includes a precision +10V reference, interface control logic, double-buffered latch and a 12-bit D/A converter with voltage output operational amplifier. Fast current switches and laser-trimmed thin-film resistors provide a highly accurate, fast D/A converter.

Digital interfacing of DAC813  is facilitated by a double buffered latch. The input latch consists of one 8-bit byte and one 4-bit nibble to allow interfacing to 8-bit (right justified format) or 16-bit data buses. Input gating logic is designed so that the last nibble or byte to be loaded can be loaded simultaneously with the transfer of data to the D/A latch saving computer instructions.

A reset control allows the DAC813 D/A latch to asynchronously reset the D/A output to bipolar zero, a feature useful for power-up reset, recalibration, or for system re-initialization upon system failure.

The DAC813 is specified to ±1/2LSB maximum linearity error (J, A grades) and ±1/4LSB (K grade). It is packaged in 28-pin 0.3" wide plastic DIP and 28-lead plastic SOIC