DAC811

MICROCOMPUTER BUS INTERFACING

·The DAC811 interface logic allows easy interface to microcomputer bus structures. The control signal WR is derived
from external device select logic and the I/O Write or Memory Write (depending upon the system design) signals from the microcomputer.

·The latch enable lines NA, NB, NC and LDAC determine which of the latches are enabled. It is permissible to enable
two or more latches simultaneously, as shown in some of the following examples.

·The double-buffered latch permits data to be loaded into the input latches of several DAC811s and later strobed into the D/A latch of all D/As, simultaneously updating all analog outputs. All the interface schemes shown below use a base address decoder. If blocks of memory are used, the base address decoder can be simplified or eliminated altogether. For instance, if half the memory space is unused, address line A15 of the microcomputer can be used as the chip select control.

+VCC ....................................................................................... 0 to +18V
VCC to ACOM ........................................................................ 0 to 18V
VDD to DCOM ............................................................................ 0 to +7V
VDD to ACOM .................................................................................... ±7V
ACOM to DCOM.................................................................................. ±7V
Digital Inputs (Pins 214, 1619) to DCOM ...................... 0.4V to +18V
External Voltage Applied to 10V Range Resistor ............................ ±12V
Ref Out ............................................................ Indefinite Short to ACOM
External Voltage Applied to DAC Output ............................... 5V to +5V
Power Dissipation ..................................................................... 1000mW
Lead Temperature (soldering, 10s) ............................................ +300°C
Max Junction Temperature ......................................................... +165°C
Thermal Resistance, qJ-A: Plastic DIP and SOIC ....................... 100°C/W
Ceramic DIP ................................................................................ 65°C/W

NOTE: Stresses above those listed above may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

The DAC811 is a complete, single-chip integratedcircuit, microprocessor-compatible, 12-bit digital-toanalog converter. The chip combines a precision voltage reference, microcomputer interface logic, and double-buffered latch, in a 12-bit D/A converter with a voltage output amplifier. Fast current switches and a laser-trimmed thin-film resistor network provide a highly accurate and fast D/A converter.

Microcomputer interfacing is facilitated by a doublebuffered latch. The input latch is divided into three 4-bit nibbles to permit interfacing to 4-, 8-, 12-, or 16-bit buses and to handle right-or left-justified data. The 12-bit data in the input latches is transferred to the D/A latch to hold the output value.

Input gating logic is designed so that loading the last nibble or byte of data can be accomplished simultaneously
with the transfer of data (previously stored in adjacent latches) from adjacent input latches to the D/A latch. This feature avoids spurious analog output values while using an interface technique that saves computer instructions.

The DAC811 is laser trimmed at the wafer level and is specified to ±1/4LSB maximum linearity error (B, K, and S grades) at 25°C and ±1/2LSB maximum over the temperature range. All grades are guaranteed monotonic over the specification temperature range.

The DAC811 is available in six performance grades and three package types. DAC811J and K are specified over the temperature ranges of 0°C to +70°C; DAC811A and B are specified over 25°C to +85°C; DAC811R and S are specified over 55°C to +125°C. DAC811J and K are packaged in a reliable 28-pin plastic DIP or plastic SOIC package, while DAC811A, B, R and S are available in a 28-pin 0.6" wide dualinline hermetically sealed ceramic side-brazed package (H package).