D485505G

Features:

• 5,048 words by 8 bits
• Asynchronous read/write operations available
• Variable length delay bits; 21 to 5,048 bits (Cycle time:  25 ns)
                                             15 to 5,048 bits (Cycle time:  35 ns)
• Power supply voltage VCC = 5.0 V ± 0.5 V
• Suitable for sampling one line of A3 size paper (16 dots/mm)
• All input/output TTL compatible
• 3-state output
• Full static operation; data hold time = infinity


Pinout




Specifications

Parameter	Symbol	Condition	Rating	Unit
Voltage on any pin relative to GND	VT		0.5Note to VCC + 0.5	V
Supply voltage	VCC		0.5 to +7.0	V
Output current	IO		20	mA
Operating ambient temperature	TA		0 to 70	˚C
Storage temperature	Tstg		55 to +125	˚C

Description

The mPD485505 is a 5,048 words by 8 bits high speed FIFO (First In First Out) line buffer. Its CMOS static circuitry provides high speed access and low power consumption.

The mPD485505 can be used for one line delay and time axis conversion in high speed facsimile machines and digital copiers.

Moreover, the mPD485505 can execute read and write operations independently on an asynchronous basis. Thus the mPD485505 is suitable as a buffer for data transfer between units with different transfer rates and as a buffer for the synchronization of multiple input signals. There are three versions, E, K, P, and L. This data sheet can be applied to the version P and L. These versions operate with different specifications. Each version is identified with its lot number (refer to 7. Example of Stamping).